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MC88915TFN100 参数 Datasheet PDF下载

MC88915TFN100图片预览
型号: MC88915TFN100
PDF下载: 下载PDF文件 查看货源
内容描述: 低偏移的CMOS PLL时钟驱动器 [LOW SKEW CMOS PLL CLOCK DRIVER]
分类和应用: 时钟驱动器
文件页数/大小: 20 页 / 220 K
品牌: MOTOROLA [ MOTOROLA, INC ]
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MC88915TFN55/70/100/133/160
MC88915TFN100
SYNC INPUT TIMING REQUIREMENTS
Symbol
tRISE/FALL,SYNC Inputs
tCYCLE, SYNC Inputs
Duty Cycle SYNC Inputs
Parameter
Rise/Fall Time, SYNC Inputs From 0.8 to 2.0V
Input Clock Period SYNC Inputs
Input Duty Cycle SYNC Inputs
Minimum
20.0
1
50%
±25%
Maximum
3.0
200
2
Unit
ns
ns
1. These tCYCLE minimum values are valid when ‘Q’ output is fed back and connected to the FEEDBACK pin. This is the configuration shown
in Figure 5b.
2. Information in Table 1 and in Note 3 of the AC specification notes describe this specification and its limits depending on what output is fed back,
and if FREQ_SEL is high or low.
DC ELECTRICAL CHARACTERISTICS
(Voltages Referenced to GND) TA =–40° C to +85° C, VCC = 5.0 V
±
5%
Symbol
VIH
VIL
VOH
VOL
Iin
ICCT
IOLD
IOHD
ICC
IOZ
1.
2.
3.
4.
Maximum Quiescent Supply
Current (per Package)
Maximum 3–State Leakage Current
Parameter
Minimum High–Level Input
Voltage
Maximum Low–Level Input
Voltage
Minimum High–Level Output
Voltage
Maximum Low–Level Output
Voltage
Maximum Input Leakage Current
Maximum ICC/Input
Minimum Dynamic Output Current
3
Test Conditions
Vout = 0.1 V or VCC – 0.1 V
Vout = 0.1 V or VCC – 0.1 V
Vin = VIH or VIL
IOH = –36 mA
1
Vin = VIH or VIL
IOL = 36 mA
1
VI = VCC or GND
VI = VCC – 2.1 V
VOLD = 1.0V Max
VOHD = 3.85V Min
VI = VCC or GND
VI = VIH or VIL;VO = VCC or GND
VCC
V
4.75
5.25
4.75
5.25
4.75
5.25
4.75
5.25
5.25
5.25
5.25
5.25
5.25
5.25
Target Limit
2.0
2.0
0.8
0.8
4.01
4.51
0.44
0.44
±1.0
2.0
2
88
–88
1.0
±50
4
Unit
V
V
V
V
µA
mA
mA
mA
mA
µA
IOL and IOH are 12mA and –12mA respectively for the LOCK output.
The PLL_EN input pin is not guaranteed to meet this specification.
Maximum test duration is 2.0ms, one output loaded at a time.
Specification value for IOZ is preliminary, will be finalized upon ‘MC’ status.
CAPACITANCE AND POWER SPECIFICATIONS
Symbol
CIN
CPD
PD1
PD2
Input Capacitance
Power Dissipation Capacitance
Power Dissipation @ 50MHz with 50Ω Thevenin Termination
Power Dissipation @ 50MHz with 50Ω Parallel Termination to GND
Parameter
Typical Values
4.5
40
23mW/Output
184mW/Device
57mW/Output
456mW/Device
Unit
pF
pF
mW
mW
Conditions
VCC = 5.0 V
VCC = 5.0 V
VCC = 5.0 V
T = 25°C
VCC = 5.0 V
T = 25° C
NOTE: PD1 and PD2 mW/Output numbers are for a ‘Q’ output.
FREQUENCY SPECIFICATIONS
(TA =–40° C to +85° C, VCC = 5.0 V
±5%)
Guaranteed Minimum
Symbol
fmax
1
Parameter
Maximum Operating Frequency (2X_Q Output)
Maximum Operating Frequency (Q0–Q4,Q5 Output)
TFN100
100
50
Unit
MHz
MHz
1. Maximum Operating Frequency is guaranteed with the part in a phase–locked condition, and all outputs loaded with 50Ω terminated to VCC/2.
MOTOROLA
6
TIMING SOLUTIONS
BR1333 — Rev 6