SN54/74LS164
SERIAL-IN PARALLEL-OUT
SHIFT REGISTER
The SN54 / 74LS164 is a high speed 8-Bit Serial-In Parallel-Out Shift Regis-
ter. Serial data is entered through a 2-Input AND gate synchronous with the
LOW to HIGH transition of the clock. The device features an asynchronous
Master Reset which clears the register setting all outputs LOW independent of
the clock. It utilizes the Schottky diode clamped process to achieve high
speeds and is fully compatible with all Motorola TTL products.
SERIAL-IN PARALLEL-OUT
SHIFT REGISTER
LOW POWER SCHOTTKY
•
•
•
•
•
•
Typical Shift Frequency of 35 MHz
Asynchronous Master Reset
Gated Serial Data Input
Fully Synchronous Data Transfers
Input Clamp Diodes Limit High Speed Termination Effects
ESD > 3500 Volts
14
1
J SUFFIX
CERAMIC
CASE 632-08
CONNECTION DIAGRAM DIP
(TOP VIEW)
VCC
14
Q7
13
Q6
12
Q5
11
Q4
10
MR
9
CP
8
NOTE:
The Flatpak version
has the same pinouts
(Connection Diagram) as
the Dual In-Line Package.
14
1
N SUFFIX
PLASTIC
CASE 646-06
14
1
A
2
B
3
Q0
4
Q1
5
Q2
6
Q3
7
GND
1
D SUFFIX
SOIC
CASE 751A-02
ORDERING INFORMATION
SN54LSXXXJ
SN74LSXXXN
SN74LSXXXD
PIN NAMES
A, B
CP
MR
Q0 – Q7
Data Inputs
Clock (Active HIGH Going Edge) Input
Master Reset (Active LOW) Input
Outputs (Note b)
LOADING
(Note a)
HIGH
0.5 U.L.
0.5 U.L.
0.5 U.L.
10 U.L.
LOW
0.25 U.L.
0.25 U.L.
0.25 U.L.
5 (2.5) U.L.
Ceramic
Plastic
SOIC
LOGIC SYMBOL
1
2
8
A
LS164
B
8-BIT SHIFT REGISTER
CP
MR Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
9
3 4
5
6 10 11 12 13
NOTES:
a) 1 TTL Unit Load (U.L.) = 40
µA
HIGH/1.6 mA LOW.
b) The Output LOW drive factor is 2.5 U.L. for Military (54) and 5 U.L. for Commercial (74)
Temperature Ranges.
VCC = PIN 14
GND = PIN 7
FAST AND LS TTL DATA
5-1
MOTOROLA [ MOTOROLA, INC ]
