SN54/74LS280
9-BIT ODD/EVEN PARITY
GENERATORS/CHECKERS
The SN54/ 74LS280 is a Universal 9-Bit Parity Generator / Checker. It fea-
tures odd / even outputs to facilitate either odd or even parity. By cascading,
the word length is easily expanded.
The LS280 is designed without the expander input implementation, but the
corresponding function is provided by an input at Pin 4 and the absence of any
connection at Pin 3. This design permits the LS280 to be substituted for the
LS180 which results in improved performance. The LS280 has buffered
inputs to lower the drive requirements to one LS unit load.
9-BIT ODD/ EVEN PARITY
GENERATORS/ CHECKERS
LOW POWER SCHOTTKY
•
•
•
•
•
Generates Either Odd or Even Parity for Nine Data Lines
Typical Data-to-Output Delay of only 33 ns
Cascadable for n-Bits
Can Be Used To Upgrade Systems Using MSI Parity Circuits
Typical Power Dissipation = 80 mW
INPUTS
VCC
14
F
13
F
G
H
1
G
2
H
3
NC
I
E
12
E
D
11
D
C
10
C
B
9
B
A
8
J SUFFIX
CERAMIC
CASE 632-08
14
1
14
N SUFFIX
PLASTIC
CASE 646-06
1
EVEN ODD
14
1
∑
∑
A
INPUTS
4
5
6
7
∑
GND
I
∑
INPUT EVEN ODD
D SUFFIX
SOIC
CASE 751A-02
OUTPUTS
ORDERING INFORMATION
FUNCTION TABLE
NUMBER OF INPUTS A
THRU 1 THAT ARE HIGH
0, 2, 4, 6, 8
1, 3, 5, 7, 9
H = HIGH Level, L = LOW Level
OUTPUTS
∑EVEN
H
L
∑ODD
L
H
SN54LSXXXJ
SN74LSXXXN
SN74LSXXXD
Ceramic
Plastic
SOIC
GUARANTEED OPERATING RANGES
Symbol
VCC
TA
IOH
IOL
Supply Voltage
Operating Ambient Temperature Range
Output Current — High
Output Current — Low
Parameter
54
74
54
74
54, 74
54
74
Min
4.5
4.75
– 55
0
Typ
5.0
5.0
25
25
Max
5.5
5.25
125
70
– 0.4
4.0
8.0
Unit
V
°C
mA
mA
FAST AND LS TTL DATA
5-456
MOTOROLA [ MOTOROLA, INC ]
