MP1496 – SYNCHRONOUS, STEP-DOWN CONVERTER WITH INTERNAL MOSFETS
OPERATION
The MP1496 is a high-frequency, synchronous,
rectified, step-down, switch-mode converter with
built-in power MOSFETs. It offers a very compact
solution to achieve 2A continuous output current
with excellent load and line regulation over a
wide input supply range,
The MP1496 operates in a fixed-frequency,
peak-current–control mode to regulate the output
voltage. An internal clock initiates a PWM cycle.
The integrated high-side power MOSFET turns
on and remains on until its current reaches the
value set by the COMP voltage. When the power
switch is off, it remains off until the next clock
cycle starts. If the current in the power MOSFET
does not reach the COMP set current value
within 95% of one PWM period, the power
MOSFET turns off.
Internal Regulator
The 5V internal regulator powers most of the
internal circuitries. This regulator takes the V
IN
input and operates in the full V
IN
range. When V
IN
exceeds 5.0V, the output of the regulator is in full
regulation. When V
IN
is less than 5.0V, the output
decreases and requires a 0.1µF ceramic
decoupling capacitor.
Error Amplifier
The error amplifier compares the FB pin voltage
against the internal 0.8V reference (REF) and
outputs a COMP voltage, which controls the
power MOSFET current. The optimized internal
compensation network minimizes the external
component counts and simplifies the control loop
design.
Enable/SYNC Control
EN is a digital control pin that turns the regulator
on and off. Drive EN high to turn on the regulator,
drive it low to turn it off. An internal 1MΩ resistor
from EN to GND allows EN to float to shut down
the chip.
A 6.5V-series Zener diode clamps the EN pin
internally as shown in Figure 2. The EN input pin
can then connect through a pullup resistor to any
voltage connected to the IN pin: The pullup
resistor limits the EN input current to less than
100µA.
For example, with V
IN
=12V, R
PULLUP
≥[(12V
– 6.5V)
÷ 100µA = 55kΩ].
MP1496 Rev. 1.05
12/26/2012
Directly connecting the EN pin a voltage source
without any pullup resistor requires limiting the
voltage source amplitude to below 6.5V to
prevent damaging the Zener diode.
EN/SYNC
Zener
6.5V-typ
GND
EN LOGIC
Figure 2: Zener Diode Circuit
For external clock synchronization, connect a
clock with a frequency range between 200kHz
and 2MHz 2ms after setting the output voltage:
The internal clock’s rising edge synchronizes with
the external clock rising edge. Select an external
clock signal with a pulse width less than 1.7μs.
Under-Voltage Lockout
Under-voltage lockout (UVLO) protects the chip
from operating at an insufficient supply voltage.
The MP1496 UVLO comparator monitors the
output voltage of the internal regulator, VCC. The
UVLO rising threshold is about 3.9V while its
falling threshold is 3.25V.
External Soft-Start
Adjust the soft-start time by connecting a
capacitor from SS pin to ground. When the soft-
start begins, an internal 11µA current source
charges the external capacitor. During soft-start,
the soft-start capacitor connects to the non-
inverting input of the error amplifier. The soft-start
period continues until the voltage on the soft-start
capacitor exceeds the 0.8V reference. Then the
non-inverting amplifier uses the reference voltage
takes as the input. Use the following equation to
calculate the soft-start time:
t
SS
(ms)
=
0.8V
×
Css(nF)
11
μ
A
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