MP2004-DUAL, LOW NOISE, HIGH PSRR, 200mA LINEAR REGULATOR
APPLICATION INFORMATION
100
Power Dissipation
The power dissipation for any package depends
on the thermal resistance of the case and circuit
board, the temperature difference between the
junction and ambient air, and the rate of airflow.
The power dissipation across the device can be
represented by the equation:
P = (V
IN
- V
OUT
)
×I
OUT
The allowable power dissipation can
calculated using the following equation:
P
(MAX)
= (T
Junction
- T
Ambient
) /
θ
JA
be
Unstable
10
1
Stable
0.1
0
40
80
120
160
200
LOAD CURRENT (mA)
Where (T
Junction
- T
Ambient
) is the temperature
difference between the junction and the
surrounding environment,
θ
JA
is the thermal
resistance from the junction to the ambient
environment. Connect the GND pin of MP2004 to
ground using a large pad or ground plane helps
to channel heat away.
Input Capacitor Selection
Using a capacitor whose value is >0.47µF on the
MP2004 input and the amount of capacitance
can be increased without limit. Larger values will
help to improve line transient response with the
drawback of increased size.
Ceramic capacitors are
preferred, but tantalum capacitors may also suffice.
Output Capacitor Selection
The MP2004 is designed specifically to work with
very low ESR ceramic output capacitor in space-
saving and performance consideration. A
ceramic capacitor in the range of 0.47µF and
10µF, and with ESR lower than 1.2Ω is suitable
for the MP2004 application circuit. Output
capacitor of larger values will help to improve
load transient response and reduce noise with
the drawback of increased size.
Figure 2—Relationship between ESR and
LDO Stability
Reverse Current Path
The PMOS used in the MP2004 has an inherent
diode connected between input and output (see
Figure3). If V
OUT
-V
IN
is more than a diode-drop,
this diode gets forward biased and starts to
conduct. To avoid misoperation, an external
Schottky connected in parallel with the internal
parasitic diode prevents it from being turned on
by limiting the voltage drop across it to about
0.3V (see Figure 4).
Figure 3—Inherent Diode Connected between
Each Regulator Input and Output
Figure 4—External Schottky Diode Connected
in Parallel with the Internal Parasitic Diode
MP2004 Rev. 0.92
4/6/2010
www.MonolithicPower.com
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7
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