MP2007
3A, 1.3V–6.0V
DDR Memory Termination Regulator
The Future of Analog IC Technology
DESCRIPTION
The MP2007 integrates the DDR memory
termination regulator with the output voltage
(VTT) and a buffered VTTREF outputs is a half
of VREF.
The VTT-LDO is a 3A sink/source tracking
termination regulator. It is specifically designed
for low-cost/low-external component count
systems, where space is a premium.
The MP2007 maintains a fast transient
response only requiring 20uF (2x10uF) of
ceramic output capacitance. The MP2007
supports Kelvin sensing functions.
The MP2007 is available in the 8-pin MSOP with
Exposed PAD
package and is specified from
−40
o
C to 85
o
C.
FEATURES
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VDDQ Voltage Range: 1.3V to 6.0 V
Up to 3A Integrated Sink/Source Linear
Regulator with Accurate VREF/2 Divider
Reference for DDR Termination
Requires Only 20uF Ceramic Output
Capacitance
Drive Voltage Range: 4.5 V to 5.5 V
1.3V Input (VDDQ) Helps Reduce Total
Power Dissipation
Integrated Divider Tracks VREF for VTT
and VTTREF
Kelvin Sensing (VTTSEN)
±20mV Accuracy for VTT and VTTREF
Built-In Soft-Start, UVLO and OCL
Thermal Shutdown
Notebook DDR2/3 Memory Supply and
Termination Voltage in ACPI Compliant
Active Termination Busses
APPLICATIONS
“MPS” and “The Future of Analog IC Technology” are Registered Trademarks of
Monolithic Power Systems, Inc.
TYPICAL APPLICATION
VDDQ
R3
20
C1
10uF
1206
6
C4
0.1uF
5V
R2
100k
EN
GND
5
C7
4.7uF
7
VDRV
VTTSEN
1
DDQ
REF
VTTREF
8
C6
0.1uF
VTTREF
MP2007DH
4
GND
VTTEN
VTT
2
C2
10uF
1206
C3
10uF
1206
VTT
C9
NC
GND
3
MP2007 Rev. 0.9
7/23/2009
www.MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2009 MPS. All Rights Reserved.
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