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DAC-HK12BMC-2 参数 Datasheet PDF下载

DAC-HK12BMC-2图片预览
型号: DAC-HK12BMC-2
PDF下载: 下载PDF文件 查看货源
内容描述: 高性能, 12位DAC与输入寄存器 [High-Performance, 12-Bit DAC’s with Input Registers]
分类和应用: 转换器
文件页数/大小: 4 页 / 60 K
品牌: MURATA-PS [ MURATA POWER SOLUTIONS INC. ]
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®
®
DAC-HK Series
High-Performance, 12-Bit
DAC’s with Input Registers
INNOVATION and EXCELLENCE
FEATURES
12-Bit resolution
Integral nonlinearity error ±1/2LSB, max.
Differential nonlinearity error ±3/4LSB, max.
MIL-STD-883 high-reliability versions available
Input register
3µs fast settling time
Guaranteed monotonicity over full temperature range
GENERAL DESCRIPTION
The DAC-HK Series hybrid D/A converters are high-
performance 12-bit devices with a fast settling voltage output.
They incorporate a level-controlled input storage register and
are specifically designed for systems applications such as data
bus interfacing with computers. When the “load” input is high,
data in the storage register is held, and when the load input is
low, data is transferred through to the DAC. There are two
basic models available by coding option: binary and two’s
complement. The output voltage ranges are externally pin-
programmable and include: 0 to +5V, 0 to +10V, ±2.5V, ±5V
and ±10V.
The DAC-HK Series contains a precision zener reference
circuit. This eliminates code-dependent ground currents by
routing current from the positive supply to the internal ground
node as determined by the R-2R ladder network. The internal
feedback resistors for the on-board amplifier track the ladder
network resistors, enhancing temperature performance. The
excellent tracking of the resistors results in a differential
nonlinearity tempco of ±2ppm/°C maximum. The temperature
coefficient of gain is ±20ppm/°C maximum, and the tempco of
zero is ±5ppm/°C maximum.
INPUT/OUTPUT CONNECTIONS
PIN
1
2
3
4
5
6
7
8
9
10
11
12
FUNCTION
BIT 1 (MSB)
BIT 2
BIT 3
BIT 4
BIT 5
BIT 6
BIT 7
BIT 8
BIT 9
BIT 10
BIT 11
BIT 12 (LSB)
PIN
24
23
22
21
20
19
18
17
16
15
14
13
FUNCTION
REFERENCE OUT
GAIN ADJUST
+15V SUPPLY
GROUND
SUMMING JUNCTION
20V RANGE
10V RANGE
BIPOLAR OFFSET
LOAD
VOLTAGE OUTPUT
–15V SUPPLY
+5V SUPPLY
REF.
OUT
24
GAIN
ADJUST
23
BIPOLAR
OFFSET
17
+15V
SUPPLY
22
–15V
SUPPLY
14
+5V
SUPPLY
13
19 20V RANGE
5k
18 10V RANGE
+5V
5k
D/A CONVERTER
LOAD 16
20
SUMMING
JUNCTION
REGISTER
74LS75
REGISTER
74LS75
REGISTER
74LS75
15
VOLTAGE
OUTPUT
21 GROUND
1 2 3 4
BITS 1 2 3 4
MSB
5 6 7 8
5 6 7 8
9 10 11 12
9 10 11 12
LSB
DIGITAL INPUTS
Figure 1. Functional Block Diagram