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NT5DS64M4CT-5T 参数 Datasheet PDF下载

NT5DS64M4CT-5T图片预览
型号: NT5DS64M4CT-5T
PDF下载: 下载PDF文件 查看货源
内容描述: 256MB DDR同步DRAM [256Mb DDR Synchronous DRAM]
分类和应用: 动态存储器双倍数据速率
文件页数/大小: 76 页 / 2682 K
品牌: NANOAMP [ NANOAMP SOLUTIONS, INC. ]
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NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT  
NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS  
NanoAmp Solutions, Inc.  
Operating Mode  
The normal operating mode is selected by issuing a Mode Register Set Command with bits A7-A12 to zero, and bits A0-A6 set  
to the desired values. A DLL reset is initiated by issuing a Mode Register Set command with bits A7 and A9-A12 each set to  
zero, bit A8 set to one, and bits A0-A6 set to the desired values. A Mode Register Set command issued to reset the DLL should  
always be followed by a Mode Register Set command to select normal operating mode.  
All other combinations of values for A7-A12 are reserved for future use and/or test modes. Test modes and reserved states  
should not be used as unknown operation or incompatibility with future versions may result.  
CAS Latencies  
CAS Latency = 2, BL = 4  
CK  
CK  
Read  
NOP  
NOP  
NOP  
NOP  
NOP  
Command  
CL=2  
DQS  
DQ  
CAS Latency = 2.5, BL = 4  
CK  
CK  
Read  
NOP  
NOP  
NOP  
NOP  
NOP  
Command  
CL=2.5  
DQS  
DQ  
Shown with nominal tAC, tDQSCK, and tDQSQ  
.
Don’t Care  
12  
DOC # 14-02-044 Rev A ECN # 01-1116  
The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com