SM5166AV
BLOCK DIAGRAM
TEST
LD
XIN
XOUT
1/8
PRESCALER
13 BIT
R COUNTER
LEVEL
SHIFTER
VDD1
AREA
VDD2
DATA
CLK
LE
VDD2
AREA
14 BIT LATCH
LOCK
DETECTOR
16 BIT
SHIFT REGISTER
PHASE
DETECTOR
LATCH
SELECTOR
BOOSTER
S. G.
DB
16 BIT LATCH
OPR
LEVEL
SHIFTER
CHARGE
PUMP
DO
VDD1
FIN
VDD1
AREA
LEVEL
SHIFTER
16 BIT
N COUNTER
VSS
WINDOW
GENERATOR
PIN DESCRIPTION
Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Name
XIN
XOUT
VDD2
DB
DO
VSS
FIN
VDD1
NC
LD
CLK
DATA
LE
OPR
NC
TEST
I/O
I
O
–
O
O
–
I
–
–
O
I
I
I
I
–
I
Description
Reference frequency divider crystal (oscillator) connection pins. Alternatively, an external clock input can
be connected to XIN. The clock is also output on XOUT.
Feedback resistor built-in for AC-coupled inputs.
Phase detector, charge pump and boost-up signal 3 V supply
boost-up signal output for faster locking
Phase detector output pin.
Built-in charge pump and tristate output means that this output can be connected to a low-pass filter.
The output polarity is preset for connection to a passive filter.
Ground pin
Operating frequency divider input pin.
Feedback resistor built-in for AC-coupled inputs.
Reference frequency and operating frequency prescaler and counter 1 V supply
No connection
Unlock signal output pin. (Unlocked when HIGH)
The function of LD can be turned OFF using the LD input control bit (LD should be tied LOW when not
used).
Control data clock input pin
Control data input pin
Control data latch enable signal input pin
Power-save control pin.
Start when HIGH, standby mode when LOW.
No connection
Test pin.
Pull-down resistor built-in. Leave open or connect to ground for normal operation.
NIPPON PRECISION CIRCUITS—2
NPC [ NIPPON PRECISION CIRCUITS INC ]
