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SM5901AF 参数 Datasheet PDF下载

SM5901AF图片预览
型号: SM5901AF
PDF下载: 下载PDF文件 查看货源
内容描述: 压缩和非压缩式防震存储器控制器内置有1M的DRAM [compression and non compression type anti-shock memory controller with built-in 1M DRAM]
分类和应用: 存储动态存储器控制器
文件页数/大小: 31 页 / 154 K
品牌: NPC [ NIPPON PRECISION CIRCUITS INC ]
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SM5901AF
compression and non compression type anti-shock
memory controller with built-in 1M DRAM
NIPPON PRECISION CIRCUITS INC.
Overview
The SM5901 is a compression and non compres-
sion type anti-shock memory controller with built-in
1M DRAM LSI for compact disc players. The com-
pression level can be set in 4 levels, and external
1M DRAM can be connected to expand the memo-
ry to 2M bits. Digital attenuator, soft mute and relat-
ed functions are also incorporated. It operates from
a 2.7 to 3.3 V wide supply voltage range.
Features
- 2-channel processing
- Serial data input
format
- System clock input
•384fs
(16.9344 MHz)
•Digital
attenuator
•2s
complement, 16-bit/MSB first, rear-packed
- Anti-shock memory controller
- ADPCM compression method
•4-level
compression mode selectable
2×1M DRAM (256K×4 bits)
1×1M DRAM (256K×4 bits)
Internal and external 1M DRAMs
pre
•Data
residual quantity detector:
15-bit operation, 16-bit output
Only internal 1M DRAM
- Compression mode selectable
- Microcontroller interface
•Serial
command write and state read-out
lim
4-bit compression mode 2.78 s/Mbit
5-bit compression mode 2.22 s/Mbit
6-bit compression mode 1.85 s/Mbit
Full-bit non compression mode 0.70 s/Mbit
•External
memory can be connected
ina
Full-bit setting
•Soft
attenuator function
•Soft
mute function
Mute ON in 23 ms max.
Direct return after soft mute release
•Forced
mute
- Extension I/O
Microcontroller interface for external control
using 5 extension I/O pins
- +2.7 to +3.3 V wide operating voltage range
- Schmitt inputs
All input pins (including I/O pins) except CLK
(system clock)
- Reset signal noise elimination
Approximately 3.8
µs
or longer (65 system
clock pulses) continuous LOW-level reset
- 44-pin QFP package (0.8 mm pin pitch)
ry
Noiseless attenuation-level switching
(256- step switching in 23 ms max.)