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SM8222AS 参数 Datasheet PDF下载

SM8222AS图片预览
型号: SM8222AS
PDF下载: 下载PDF文件 查看货源
内容描述: 来电显示服务IC,具有呼叫等待 [Caller ID Service IC with Call Waiting]
分类和应用: 电信电路电话电路光电二极管
文件页数/大小: 15 页 / 113 K
品牌: NPC [ NIPPON PRECISION CIRCUITS INC ]
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SM8222A/B
FUNCTIONAL DESCRIPTION
The SM8222A/B conforms with the SR-TSV-
002476 (Bellcore) dialer telephone number display
standards. It supports the following functions.
s
s
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Mode 0
Mode 1
Using these functions enables systems with the fol-
lowing features to be easily constructed.
s
s
Ring Signal Detection
FSK Demodulation
pre
s
s
s
s
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s
The SM8222A/B incorporates an FSK demodulator
to recover the dialer telephone number and other
information which is sent as an FSK signal. It sup-
ports two demodulator output modes to facilitate var-
ious circuit design approaches.
The FSK signal (Bellcore) standard is described as
follows.
Modulation type: Continuous-phase binary fre-
quency-shift-keying
Logic 1 data (mark): 1200 ± 12 Hz
Logic 0 data (space): 2200 ± 22 Hz
Input level (mark):
−32
to
−12
dBm
Input level (space):
−36
to
−12
dBm
Transmission speed: 1200 ± 12 baud
The FSK output is controlled by the FSKEN pin.
When FSKEN is HIGH, the signal pins DOUT,
DCLK, DR and CDET are all HIGH.
The decoded FSK signal is output on DOUT. The
mode of the output timing circuit, mode 0 or mode 1,
is set by the input on MODE.
NIPPON PRECISION CIRCUITS—11
lim
The telephone line input signals L1 and L2 pass
through surge protection circuits and are input to a
capacitor, resistor and diode bridge, as shown in the
typical application circuit example. The signal is
full-wave rectified by the diode bridge and the bridge
output is level shifted by the resistor voltage divider
for input to RDIN. A ring signal input on RDIN
causes RDRC to become active, driving an RC time
constant circuit formed by an external capacitor and
resistor, before the detection signal is output on
RDET. If the ring signal supplied by the inputs L1
and L2 is above the level set by the resistor divider,
then the detect output RDET goes LOW. When a
ring signal is detected, INT also goes LOW.
ina
Dual Tone Detection
s
Ring signal and polarity reversal signal detection
dialer telephone number display before telephone
off-hook
dialer telephone number display after telephone
off-hook (during conversation)
In mode 1, DR goes LOW when data is received.
From that point on, the data is read out with timing
set by an external clock input on DCLK. In this
mode, data can be read out at a different speed to the
input data rate.
After a conversation has been initiated (after tele-
phone is off-hook), the dialer telephone number ser-
vice information is sent by mixing two signals, 2130
and 2750 Hz, on the line inputs L1 and L2. The
SM8222A/B incorporates detectors to recover these
two signals from the conversation “noise” signal.
The two signals are recovered using two high-order
filters with center frequencies of 2130 and 2750 Hz,
respectively, in the final stage.
The SM8222A/B uses a detection circuit with time
delay built-in so that detection is maintained for an
input signal where the input level temporarily rises
above the rated value or falls below the rated value to
a level of non-detection. When the 2130 and
2750 Hz signals are simultaneously detected, EST
goes HIGH and starts charging the time constant cir-
cuit formed by an external capacitor and resistor.
When the time constant circuit voltage STGT rises
above a threshold voltage, STD goes HIGH to indi-
cate the dual tone signal has been detected. When a
dual tone signal is detected, INT also becomes active
and goes LOW.
ry
Ring signal detection
FSK demodulation
Dual tone detection
In mode 0, the received data and the clock that the
data is synchronized to are both output. In addition,
an output pulse occurs on DR with the same timing
as each stop bit in the input data stream.