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SM9503A 参数 Datasheet PDF下载

SM9503A图片预览
型号: SM9503A
PDF下载: 下载PDF文件 查看货源
内容描述: 电波钟接收器IC [Radio Controlled Clock Receiver IC]
分类和应用:
文件页数/大小: 9 页 / 120 K
品牌: NPC [ NIPPON PRECISION CIRCUITS INC ]
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SM9503A
Decoder Circuit
The detector output and peak/bottom hold mid-level potential reference are used to decode the time code sig-
nal, which is output on pin OUT. The output is active-LOW, so that the output is LOW when the input ampli-
tude is HIGH.
V
DD
potential
Rectifier
LPF
LPF waveform
V
DD
potential
Bottom hold
Peak/
Bottom
Hold
Mid-level potential
Peak hold
Standby Function
When PON is open (or HIGH), the device is in standby mode and the current consumption is reduced. Receiver
operation starts when PON goes LOW.
PON
Open (or HIGH)
LOW
Mode
Standby
OUT
pre
NIPPON PRECISION CIRCUITS INC.—8
lim
Operating
Time code
ina
ry
V
DD
potential
Decoder
OUT output
V
SS
potential
HIGH