5076 series
PAD LAYOUT
(Unit:
µ
m)
I
5076A
×
(for Flip Chip Bonding)
I
5076B
×
(for Wire Bonding)
(420, 345)
VSS
Y
VC
5
6
1
(0,0)
2
4
3
(420, 345)
Q
Y VDD
5
6
1
(0,0)
2
4
3
Q
VDD
VSS
VC
(−420,
−345)
XT
X
XTN
(−420,
−345)
XTN
X
XT
Chip size: 0.84
×
0.69mm
Chip thickness: 130µm ± 15µm
PAD size: 90µm
×
90µm
Chip base: V
SS
level
Chip size: 0.84
×
0.69mm
Chip thickness: 130µm ± 15µm
PAD size: 90µm
×
90µm
Chip base: V
SS
level
PAD DIMENSIONS
Pad dimensions [µm]
Pad No.
X
1
2
3
4
5
6
–189
189
315
315
–315
–315
Y
–240
–240
–21
225
225
–21
PIN DESCRIPTION
Pad No.
5076A
×
1
2
3
4
5
6
5076B
×
2
1
6
5
4
3
Pin
XT
XTN
VDD
Q
VSS
VC
I/O
I
O
–
O
–
I
Description
Crystal connection pin (amplifier input)
Crystal connection pin (amplifier output)
(+) supply pin
Clock output pin
(
−
) supply pin
Oscillation frequency control voltage input pin (positive polarity)
(frequency increases with increasing voltage)
BLOCK DIAGRAM
Voltage
Regulator
C
IN
R
f
VDD
Oscillation
Detector
R
D
C
OUT
Level Shifter
XT
XTN
R
VC2
1
N
*1
CMOS ouput
Buffer
Q
VC
R
VC1
C
VC1
C
VC2
VSS
*1. N = 1, 2, 4, 8, 16
SEIKO NPC CORPORATION —3
NPC [ NIPPON PRECISION CIRCUITS INC ]
