August 1998
100325
Low Power Hex ECL-to-TTL Translator
General Description
Features
n Pin/function compatible with 100125
n Meets 100125 AC specifications
n 50% power reduction of the 100125
n Differential inputs with built in offset
n Standard FAST® outputs
The 100325 is a hex translator for converting F100K logic
levels to TTL logic levels. Differential inputs allow each circuit
to be used as an inverting, non-inverting or differential re-
ceiver. An internal reference voltage generator provides VBB
for single-ended operation, or for use in Schmitt trigger appli-
cations. All inputs have 50 kΩ pull-down resistors. When the
inputs are either unconnected or at the same potential the
outputs will go low.
n 2000V ESD protection
n −4.2V to −5.7V operating range
n Available to Microcircuit Drawing
(SMD) 5962-9153101
When used in single-ended operation the apparent input
threshold of the true inputs is 20 mV to 40 mV higher (posi-
tive) than the threshold of the complementary inputs. The
VEE and VTTL power may be applied in either order.
Logic Diagram
Pin Names
D0–D5
Description
Data Inputs
D0–D5
Q0–Q5
Inverting Data Inputs
Data Outputs
DS100314-4
FAST® is a registered trademark of Fairchild Semiconductor.
© 1998 National Semiconductor Corporation
DS100314
www.national.com
NSC [ National Semiconductor ]
