August 1998
100328
Low Power Octal ECL/TTL Bi-Directional Translator with
Latch
General Description
Features
n Identical performance to the 100128 at 50% of the
supply current
The 100328 is an octal latched bi-directional translator de-
signed to convert TTL logic levels to 100K ECL logic levels
and vice versa. The direction of this translation is determined
by the DIR input. A LOW on the output enable input (OE)
holds the ECL outputs in a cut-off state and the TTL outputs
at a high impedance level. A HIGH on the latch enable input
(LE) latches the data at both inputs even though only one
output is enabled at the time. A LOW on LE makes the
100328 transparent.
n Bi-directional translation
n 2000V ESD protection
n Latched outputs
n FAST TTL outputs
n TRI-STATE® outputs
=
n Voltage compensated operating range
−4.2V to −5.7V
The cut-off state is designed to be more negative than a nor-
mal ECL LOW level. This allows the output emitter-followers
to turn off when the termination supply is −2.0V, presenting a
high impedance to the data bus. This high impedance re-
duces termination power and prevents loss of low state
noise margin when several loads share the bus.
n Available to MIL-STD-883
The 100328 is designed with FAST® TTL output buffers, fea-
turing optimal DC drive and capable of quickly charging and
discharging highly capacitive loads. All inputs have 50 kΩ
pull-down resistors.
Logic Symbol
DS100295-1
Pin Names
Description
E0–E7
T0–T7
OE
ECL Data I/O
TTL Data I/O
Output Enable Input
Latch Enable Input
Direction Control Input
LE
DIR
All pins function at 100K ECL levels except for T –T .
0
7
TRI-STATE® is a registered trademark of National Semiconductor Corporation.
FAST® is a registered trademark of Fairchild Semiconductor.
© 1998 National Semiconductor Corporation
DS100295
www.national.com
NSC [ National Semiconductor ]
