June 1989
54122/DM74122
Retriggerable Resettable Multivibrator
General Description
The ’122 features positive and negative DC level triggering
by a LOW signal applied to C , which also prevents trigger-
D
inputs, complementary outputs, an optional 10 kX internal
timing resistor and an overriding Direct Clear (C ) input.
D
ing. An internal connection from C to the input gate makes
D
it possible to trigger the circuit by a positive-going signal on
When the circuit is in the quasi-stable (delay) state, another
trigger applied to the inputs (per Truth Table) will cause the
delay period to start again, without disturbing the outputs.
This process can be repeated indefinitely and thus the out-
put pulse period (Q HIGH, Q LOW) can be made as long as
desired. Alternatively, a delay period can be terminated
C , as shown in the Truth Table. For timing capacitor values
D
greater than 1000 pF, the output pulse width is defined as
follows:
e
a
0.7/R )
t
w
0.32 R C (1.0
X
X
X
Where t is in ns, R is in kX and C is in pF.
w
X
X
Connection Diagram
Logic Symbol
Dual-In-Line Package
TL/F/10212–2
e
V
Pin 14
CC
GND
e
Pin 7
Pins 10 and 12
TL/F/10212–1
Order Number 54122DMQB, 54122FMQB or DM74122N
See NS Package Number J14A, N14A or W14B
e
NC
Pin Names
Description
A , A
1
Trigger Inputs (Active Falling Edge)
Trigger Inputs (Active Rising Edge)
Direct Clear Inputs (Active LOW)
Outputs
2
B , B
1
2
C
D
Q, Q
C
1995 National Semiconductor Corporation
TL/F/10212
RRD-B30M105/Printed in U. S. A.
NSC [ National Semiconductor ]
