June 1989
54154/DM54154/DM74154
4-Line to 16-Line Decoders/Demultiplexers
General Description
Features
Y
Decodes 4 binary-coded inputs into one of 16 mutually
exclusive outputs
Each or these 4-line-to-16-line decoders utilizes TTL circuit-
ry to decode four binary-coded inputs into one of sixteen
mutually exclusive outputs when both the strobe inputs, G1
and G2, are low. The demultiplexing function is performed
by using the 4 input lines to address the output line, passing
data from one of the strobe inputs with the other strobe
input low. When either strobe input is high, all outputs are
high. These demultiplexers are ideally suited for implement-
ing high-performance memory decoders. All inputs are buff-
ered and input clamping diodes are provided to minimize
transmission-line effects and thereby simplify system de-
sign.
Y
Performs the demultiplexing function by distributing data
from one input line to any one of 16 outputs
Input clamping diodes simplify system design
High fan-out, low-impedance, totem-pole outputs
Typical propagation delay
Y
Y
Y
3 levels of logic 19 ns
Strobe 18 ns
Y
Y
Typical power dissipation 170 mW
Alternate Military/Aerospace device (54154) is avail-
able. Contact a National Semiconductor Sales Office/
Distributor for specifications.
Connection Diagram
Dual-In-Line Package
TL/F/6548–1
Order Number 54154DMQB, 54154FMQB, DM54154J or DM74154N
See NS Package Number J24A, N24A or W24C
C
1995 National Semiconductor Corporation
TL/F/6548
RRD-B30M105/Printed in U. S. A.
NSC [ National Semiconductor ]
