November 1998
54AC163 • 54ACT163
Synchronous Presettable Binary Counter
n Synchronous counting and loading
General Description
n High-speed synchronous expansion
n Typical count rate of 125 MHz
n Outputs source/sink 24 mA
n ’ACT163 has TTL-compatible inputs
n Standard Microcircuit Drawing (SMD)
— ’AC163: 5962-89582
The ’AC/’ACT163 are high-speed synchronous modulo-16
binary counters. They are synchronously presettable for ap-
plication in programmable dividers and have two types of
Count Enable inputs plus a Terminal Count output for versa-
tility in forming synchronous multistage counters. The ’AC/
’ACT163 has a Synchronous Reset input that overrides
counting and parallel loading and allows the outputs to be si-
multaneously reset on the rising edge of the clock.
— ’ACT163: 5962-91723
Features
n ICC reduced by 50%
Logic Symbols
Pin
Names
CEP
CET
CP
Description
Count Enable Parallel Input
Count Enable Trickle Input
Clock Pulse Input
SR
Synchronous Reset Input
Parallel Data Inputs
P0–P3
PE
Parallel Enable Input
Flip-Flop Outputs
Q0–Q3
TC
Terminal Count Output
DS100275-1
IEEE/IEC
DS100275-2
™
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© 1998 National Semiconductor Corporation
DS100275
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