54F 74F32 Quad 2-Input OR Gate
December 1994
54F 74F32
Quad 2-Input OR Gate
General Description
This device contains four independent gates each of which
performs the logic OR function
Features
Y
Guaranteed 4000V minimum ESD protection
Commercial
74F32PC
Military
Package
Number
N14A
Package Description
14-Lead (0 300 Wide) Molded Dual-In-Line
14-Lead Ceramic Dual-In-Line
14-Lead (0 150 Wide) Molded Small Outline JEDEC
14-Lead (0 300 Wide) Molded Small Outline EIAJ
14-Lead Cerpack
20-Lead Ceramic Leadless Chip Carrier Type C
54F32DM (Note 2)
74F32SC (Note 1)
74F32SJ (Note 1)
54F32FM (Note 2)
54F32LM (Note 2)
J14A
M14A
M14D
W14B
E20A
Note 1
Devices also available in 13 reel Use suffix
e
SCX and SJX
Note 2
Military grade device with environmental and burn-in processing Use suffix
e
DMQB FMQB and LMQB
Logic Symbol
IEEE IEC
Connection Diagrams
Pin Assignment for
DIP SOIC and Flatpak
Pin Assignment
for LCC
TL F 9463–3
TL F 9463 – 2
TL F 9463 – 1
Unit Loading Fan Out
54F 74F
Pin Names
Description
UL
HIGH LOW
10 10
50 33 3
Input I
IH
I
IL
Output I
OH
I
OL
20
mA
b
0 6 mA
b
1 mA 20 mA
A
n
B
n
O
n
Inputs
Outputs
TRI-STATE is a registered trademark of National Semiconductor Corporation
C
1995 National Semiconductor Corporation
TL F 9463
RRD-B30M75 Printed in U S A
NSC [ NATIONAL SEMICONDUCTOR ]
