Functional Description
The MM58274C is a bus oriented microprocessor real time
clock It has the same pin-out as the MM58174A while offer-
ing extended timekeeping up to units and tens of years To
enhance the device further a number of other features have
been added including 12 or 24 hours counting a testable
data-changed flag giving easy error-free time reading and
simplified interrupt control
A buffered oscillator signal appears on the interrupt output
when the device is in test mode This allows for easy oscilla-
tor setting when the device is initially powered up in a sys-
tem
The counters are arranged as 4-bit words and can be ran-
domly accessed for time reading and setting The counters
output in BCD (binary coded decimal) 4-bit numbers Any
register which has less than 4 bits (e g days of week uses
only 3 bits) will return a logic 0 on any unused bits When
written to the unused inputs will be ignored
Writing a logic 1 to the clock start stop control bit resets the
internal oscillator divider chain and the tenths of seconds
counter Writing a logic 0 will start the clock timing from the
nearest second The time then updates every 100 ms with
all counters changing synchronously Time changing during
a read is detected by testing the data-changed bit of the
control register after completing a string of clock register
reads
Interrupt delay times of 0 1s 0 5s 1s 5s 10s 30s or 60s
can be selected with single or repeated interrupt outputs
The open drain output is pulled low whenever the interrupt
timer times out and is cleared by reading the control regis-
ter
CIRCUIT DESCRIPTION
The block diagram in
Figure 1
shows the internal structure
of the chip The 16-pin package outline is shown in
Figure 2
Crystal Oscillator
This consists of a CMOS inverter amplifier with an on-chip
bias resistor Externally a 20 pF capacitor a 6 pF– 36 pF
trimmer capacitor and a crystal are suggested to complete
the 32 768 kHz timekeeping oscillator circuit
The 6 pF – 36 pF trimmer fine tunes the crystal load imped-
ance optimizing the oscillator stability When properly ad-
justed (i e to the crystal frequency of 32 768 kHz) the cir-
cuit will display a frequency variation with voltage of less
than 3 ppm V When an external oscillator is used connect
to oscillator input and float (no connection) the oscillator
output
When the chip is enabled into test mode the oscillator is
gated onto the interrupt output pin giving a buffered oscilla-
tor output that can be used to set the crystal frequency
when the device is installed in a system For further informa-
tion see the section on Test Mode
Divider Chain
The crystal oscillator is divided down in three stages to pro-
duce a 10 Hz frequency setting pulse The first stage is a
non-integer divider which reduces the 32 768 kHz input to
30 720 kHz This is further divided by a 9-stage binary ripple
counter giving an output frequency of 60 Hz A 3-stage
Johnson counter divides this by six generating a 10 Hz out-
put The 10 Hz clock is gated with the 32 768 kHz crystal
frequency to provide clock setting pulses of 15 26
ms
dura-
tion The setting pulse drives all the time registers on the
Use resistor with Ni-cad cells only
TL F 11219 – 6
FIGURE 3 Typical System Connection Diagram
5
NSC [ NATIONAL SEMICONDUCTOR ]
