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M25PX64 参数 Datasheet PDF下载

M25PX64图片预览
型号: M25PX64
PDF下载: 下载PDF文件 查看货源
内容描述: 64兆位,双I / O , 4 KB的界别分组擦除,串行闪存与75 MHz的SPI总线接口 [64-Mbit, dual I/O, 4-Kbyte subsector erase, serial flash memory with 75 MHz SPI bus interface]
分类和应用: 闪存
文件页数/大小: 66 页 / 1330 K
品牌: NUMONYX [ NUMONYX B.V ]
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M25PX64
64-Mbit, dual I/O, 4-Kbyte subsector erase,
serial flash memory with 75 MHz SPI bus interface
Preliminary Data
Features
SPI bus compatible serial interface
75 MHz (maximum) clock frequency
2.7 V to 3.6 V single supply voltage
Dual input/output instructions resulting in an
equivalent clock frequency of 150 MHz:
– Dual output fast read instruction
– Dual input fast program instruction
Whole memory continuously read by sending
once a fast read or a dual output fast read
instruction and an address
64 Mbit Flash memory
– Uniform 4-Kbyte subsectors
– Uniform 64-Kbyte sectors
Additional 64-byte user-lockable, one-time
programmable (OTP) area
Erase capability
– Subsector (4-Kbyte) granularity
– Sector (64-Kbyte) granularity
– Bulk erase (64 Mbits) in 35 s (typical with
V
PP
= 9 V)
Write protections
– Software write protection applicable to
every 64-Kbyte sector (volatile lock bit)
– Hardware write protection: protected area
size defined by three non-volatile bits (BP0,
BP1 and BP2)
Deep power-down mode: 5 µA (typical)
Electronic signature
– JEDEC standard two-byte signature
(7117h)
– Unique ID code (UID) with 16 bytes read-
only, available upon customer request
More than 100 000 write cycles per sector
More than 20 years data retention
Packages
– ECOPACK® (RoHS compliant)
VDFPN8 (ME)
8 × 6 mm (MLP8)
SO16 (MF)
300 mils width
March 2008
Rev 2
1/66
1
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to
change without notice.