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M29W064FB70N3F 参数 Datasheet PDF下载

M29W064FB70N3F图片预览
型号: M29W064FB70N3F
PDF下载: 下载PDF文件 查看货源
内容描述: 64兆位( 8兆比特×8或4兆位×16 ,网页,引导块) 3 V电源闪存 [64 Mbit (8 Mbit x 8 or 4 Mbit x 16, page, boot block) 3 V supply Flash memory]
分类和应用: 闪存存储内存集成电路光电二极管
文件页数/大小: 69 页 / 1265 K
品牌: NUMONYX [ NUMONYX B.V ]
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M29W064FT, M29W064FB  
Command interface  
4.2.3  
Octuple Byte Program command  
This is used to write eight adjacent bytes, in x 8 mode, simultaneously. The addresses of the  
eight bytes must differ only in A1, A0 and DQ15A-1.  
Nine bus write cycles are necessary to issue the command:  
1. The first bus cycle sets up the command  
2. The second bus cycle latches the address and the data of the first byte to be written  
3. The third bus cycle latches the address and the data of the second byte to be written  
4. The fourth bus cycle latches the address and the data of the third byte to be written  
5. The fifth bus cycle latches the address and the data of the fourth byte to be written  
6. The sixth bus cycle latches the address and the data of the fifth byte to be written  
7. The seventh bus cycle latches the address and the data of the sixth byte to be written  
8. The eighth bus cycle latches the address and the data of the seventh byte to be written.  
9. The ninth bus cycle latches the address and the data of the eighth byte to be written  
and starts the program/erase controller.  
4.2.4  
Double Word Program command  
The Double Word Program command is used to write a page of two adjacent words in  
parallel. The two words must differ only for the address A0.  
Three bus write cycles are necessary to issue the Double Word Program command:  
The first bus cycle sets up the Quadruple Word Program command.  
The second bus cycle latches the address and the data of the first word to be written  
The third bus cycle latches the address and the data of the second word to be written  
and starts the program/erase controller.  
After the program operation has completed the memory will return to the read mode, unless  
an error has occurred. When an error occurs bus read operations will continue to output the  
status register. A Read/Reset command must be issued to reset the error condition and  
return to read mode.  
Note that the fast program commands cannot change a bit set to ’0’ back to ’1’. One of the  
erase commands must be used to set all the bits in a block or in the whole memory from ’0’  
to ’1’.  
Typical program times are given in Table 8: Program, erase times and program, erase  
endurance cycles.  
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