Command interface
M29W320ET, M29W320EB
4
Command interface
All Bus Write operations to the memory are interpreted by the Command interface.
Commands consist of one or more sequential Bus Write operations. Failure to observe a
valid sequence of Bus Write operations will result in the memory returning to Read mode.
The long command sequences are imposed to maximize data security.
The address used for the commands changes depending on whether the memory is in 16-
bit or 8-bit mode. See either
or
depending on the configuration that is being
used, for a summary of the commands.
4.1
Read/Reset command
The Read/Reset command returns the memory to its Read mode. It also resets the errors in
the Status register. Either one or three Bus Write operations can be used to issue the
Read/Reset command.
The Read/Reset command can be issued, between Bus Write cycles before the start of a
program or erase operation, to return the device to read mode. If the Read/Reset command
is issued during the time-out of a Block erase operation then the memory will take up to
10µs to abort. During the abort period no valid data can be read from the memory. The
Read/Reset command will not abort an Erase operation when issued while in Erase
Suspend.
4.2
Auto Select command
The Auto Select command is used to read the Manufacturer code, the Device code, the
Block Protection Status and the Extended memory Block Verify code. Three consecutive
Bus Write operations are required to issue the Auto Select command. The memory remains
in Auto Select mode until a Read/Reset or CFI Query command is issued.
In Auto Select mode the Manufacturer code can be read using a Bus Read operation with
A0 = V
IL
and A1 = V
IL
. The other address bits may be set to either V
IL
or V
IH
.
The Device code can be read using a Bus Read operation with A0 = V
IH
and A1 = V
IL
. The
other address bits may be set to either V
IL
or V
IH
.
The Block Protection Status of each block can be read using a Bus Read operation with A0
= V
IL
, A1 = V
IH
and A12-A20 specifying the block address. The other address bits may be
set to either V
IL
or V
IH
. If the addressed block is protected then 01h is output on Data
Inputs/Outputs DQ0-DQ7, otherwise 00h is output.
20/63
NUMONYX [ NUMONYX B.V ]
