Signal descriptions
M29W400DT, M29W400DB
2.7
Write Enable (W)
The Write Enable, W, controls the Bus Write operation of the memory’s command interface.
2.8
Reset/Block Temporary Unprotect (RP)
The Reset/Block Temporary Unprotect pin can be used to apply a hardware reset to the
memory or to temporarily unprotect all blocks that have been protected.
A hardware reset is achieved by holding Reset/Block Temporary Unprotect Low, V
IL
, for at
least t
PLPX
. After Reset/Block Temporary Unprotect goes High, V
IH
, the memory will be
ready for Bus Read and Bus Write operations after t
PHEL
or t
RHEL
, whichever occurs last.
See the Ready/Busy output section,
and
for more
details.
Holding RP at V
ID
will temporarily unprotect the protected blocks in the memory. Program
and Erase operations on all blocks will be possible. The transition from V
IH
to V
ID
must be
slower than t
PHPHH
.
2.9
Ready/Busy output (RB)
The Ready/Busy pin is an open-drain output that can be used to identify when the memory
array can be read. Ready/Busy is high-impedance during Read mode, Auto Select mode
and Erase Suspend mode.
After a Hardware Reset, Bus Read and Bus Write operations cannot begin until Ready/Busy
becomes high-impedance. See
and
During Program or Erase operations Ready/Busy is Low, V
OL
. Ready/Busy will remain Low
during Read/Reset commands or hardware resets until the memory is ready to enter Read
mode.
2.10
Byte/Word Organization Select (BYTE)
The Byte/Word Organization Select pin is used to switch between the 8-bit and 16-bit Bus
modes of the memory. When Byte/Word Organization Select is Low, V
IL
, the memory is in 8-
bit mode, when it is High, V
IH
, the memory is in 16-bit mode.
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NUMONYX [ NUMONYX B.V ]
