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M29W640FB70N6E 参数 Datasheet PDF下载

M29W640FB70N6E图片预览
型号: M29W640FB70N6E
PDF下载: 下载PDF文件 查看货源
内容描述: 64兆位(8MB X8或X16 4Mb的,页,引导块) 3V供应闪存 [64 Mbit (8Mb x8 or 4Mb x16, Page, Boot Block) 3V Supply Flash Memory]
分类和应用: 闪存存储内存集成电路光电二极管
文件页数/大小: 71 页 / 1409 K
品牌: NUMONYX [ NUMONYX B.V ]
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M29W640FT, M29W640FB  
Command interface  
4.1.3  
Read CFI Query command  
The Read CFI Query Command is used to read data from the Common Flash Interface  
(CFI) Memory Area. This command is valid when the device is in the Read Array mode, or  
when the device is in Autoselected mode.  
One Bus Write cycle is required to issue the Read CFI Query Command. Once the  
command is issued subsequent Bus Read operations read from the Common Flash  
Interface Memory Area.  
The Read/Reset command must be issued to return the device to the previous mode (the  
Read Array mode or Autoselected mode). A second Read/Reset command would be  
needed if the device is to be put in the Read Array mode from Autoselected mode.  
See Appendix B: Common Flash Interface (CFI), Tables 23, 24, 25, 26, 27 and 28 for details  
on the information contained in the Common Flash Interface (CFI) memory area.  
4.1.4  
Chip Erase command  
The Chip Erase command can be used to erase the entire chip. Six Bus Write operations  
are required to issue the Chip Erase Command and start the Program/Erase Controller.  
If any blocks are protected then these are ignored and all the other blocks are erased. If all  
of the blocks are protected the Chip Erase operation appears to start but will terminate  
within about 100µs, leaving the data unchanged. No error condition is given when protected  
blocks are ignored.  
During the erase operation the memory will ignore all commands, including the Erase  
Suspend command. It is not possible to issue any command to abort the operation. Typical  
chip erase times are given in Table 8: Program, Erase times and Program, Erase Endurance  
cycles. All Bus Read operations during the Chip Erase operation will output the Status  
Register on the Data Inputs/Outputs. See the section on the Status Register for more  
details.  
After the Chip Erase operation has completed the memory will return to the Read Mode,  
unless an error has occurred. When an error occurs the memory will continue to output the  
Status Register. A Read/Reset command must be issued to reset the error condition and  
return to Read Mode.  
The Chip Erase Command sets all of the bits in unprotected blocks of the memory to ’1’. All  
previous data is lost.  
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