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M29W640FB60N6E 参数 Datasheet PDF下载

M29W640FB60N6E图片预览
型号: M29W640FB60N6E
PDF下载: 下载PDF文件 查看货源
内容描述: 64兆位(8MB X8或X16 4Mb的,页,引导块) 3V供应闪存 [64 Mbit (8Mb x8 or 4Mb x16, Page, Boot Block) 3V Supply Flash Memory]
分类和应用: 闪存
文件页数/大小: 71 页 / 1409 K
品牌: NUMONYX [ NUMONYX B.V ]
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M29W640FT, M29W640FB
Command interface
4.2
Fast Program commands
There are four Fast Program commands available to improve the programming throughput,
by writing several adjacent words or bytes in parallel. The Double, Quadruple and Octuple
Byte Program commands are available for x8 operations, while the Double Quadruple Word
Program command are available for x16 operations.
Fast Program commands can be suspended and then resumed by issuing a Program
Suspend command and a Program Resume command, respectively (see
and
When V
PPH
is applied to the V
PP
/Write Protect pin the memory automatically enters the Fast
Program mode. The user can then choose to issue any of the Fast Program commands.
Care must be taken because applying a V
PPH
to the V
PP
/WP pin will temporarily unprotect
any protected block.
4.2.1
Double Byte Program command
The Double Byte Program command is used to write a page of two adjacent Bytes in
parallel. The two bytes must differ only in DQ15A-1. Three bus write cycles are necessary to
issue the Double Byte Program command.
1.
2.
3.
The first bus cycle sets up the Double Byte Program Command.
The second bus cycle latches the Address and the Data of the first byte to be written.
The third bus cycle latches the Address and the Data of the second byte to be written.
4.2.2
Quadruple Byte Program command
The Quadruple Byte Program command is used to write a page of four adjacent Bytes in
parallel. The four bytes must differ only for addresses A0, DQ15A-1. Five bus write cycles
are necessary to issue the Quadruple Byte Program command.
1.
2.
3.
4.
5.
The first bus cycle sets up the Quadruple Byte Program Command.
The second bus cycle latches the Address and the Data of the first byte to be written.
The third bus cycle latches the Address and the Data of the second byte to be written.
The fourth bus cycle latches the Address and the Data of the third byte to be written.
The fifth bus cycle latches the Address and the Data of the fourth byte to be written and
starts the Program/Erase Controller.
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