DC and AC parameters
M45PE80
(1)
Table 14. AC characteristics (50 MHz operation)
50 MHz preliminary data for T9HX technology(2)
Test conditions specified in Table 8 and Table 9
Symbol Alt.
Parameter
Min.
Typ.
Max.
Unit
Clock frequency for the following instructions:
FAST_READ, PW, PP, PE, SE, DP, RDP,
WREN, WRDI, RDSR, RDID
fC
fR
fC
D.C.
50
33
MHz
Clock frequency for READ instructions
D.C.
9
MHz
ns
ns
V/ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
µs
µs
µs
(3)
tCH
tCLH Clock High time
tCLL Clock Low time
(3)
tCL
9
Clock slew rate(4) (peak to peak)
0.1
5
tSLCH
tCHSL
tDVCH
tCHDX
tCHSH
tSHCH
tSHSL
tCSS S active setup time (relative to C)
S not active hold time (relative to C)
tDSU Data in setup time
5
2
tDH Data in hold time
5
S active hold time (relative to C)
S not active setup time (relative to C)
tCSH S deselect time
5
5
100
(4)
tSHQZ
tCLQV
tCLQX
tWHSL
tSHWL
tDIS Output disable time
8
8
tV
tHO Output hold time
Write Protect setup time
Clock Low to Output Valid
0
50
Write Protect hold time
S to Deep Power-down
S High to Standby mode
100
(4)
tDP
3
30
10
3
(4)
tRDP
(4)
tRLRH
tRST Reset pulse width
tREC Reset recovery time
Chip should have been deselected before
tRHSL
tSHRH
10
23
ns
Reset is de-asserted
(5)
tPW
Page Write cycle time (256 bytes)
Page Program cycle time (256 bytes)
Page Program cycle time (n bytes)
Page Erase cycle time
11
ms
0.8
(5)
tPP
3
ms
int(n/8) × 0.025
tPE
10
1
20
5
ms
s
tSE
Sector Erase cycle time
1. Preliminary data.
2. Delivery of parts in T9HX process to start from June 2007.
3. tCH + tCL must be greater than or equal to 1/ fC
4. Value guaranteed by characterization, not 100% tested in production.
5. n = number of bytes to program. int(A) corresponds to the upper integer part of A. Examples: int(1/8) = 1, int(16/8) = 2,
int(17/8) = 3.
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