Status Register
M58BW16F, M58BW32F
5.3
Erase Status (bit 5)
The Erase Status bit can be used to identify if the memory has failed to verify that the block
has erased correctly. The Erase Status bit should be read once the Program/Erase
Controller Status bit is High (Program/Erase controller inactive).
When the Erase Status bit is set to ‘0’, the memory has successfully verified that the block
has erased correctly. When the Erase Status bit is set to ‘1’, the Program/Erase controller
has applied the maximum number of pulses to the block and still failed to verify that the
block has erased correctly.
Once set to ‘1’, the Erase Status bit can only be reset to ‘0’ by a Clear Status Register
command or a hardware reset. If set to ‘1’ it should be reset before a new Program or Erase
command is issued, otherwise the new command will appear to fail.
5.4
Program/Write to Buffer and Program Status (bit 4)
The Program/Write to Buffer and Program Status bit is used to identify a Program failure or
a Write to Buffer and Program failure. Bit 4 should be read once the Program/Erase
Controller Status bit is High (Program/Erase controller inactive).
When bit 4 is set to ‘0’ the memory has successfully verified that the device has
programmed correctly. When bit 4 is set to ‘1’ the device has failed to verify that the data has
been programmed correctly.
Once set to ‘1’, the Program Status bit can only be reset to ‘0’ by a Clear Status Register
command or a hardware reset. If set to ‘1’ it should be reset before a new Program or Erase
command is issued, otherwise the new command will appear to fail.
5.5
PEN Status (bit 3)
The PEN Status bit can be used to identify if a Program or Erase operation has been
attempted when PEN is Low, V
IL
.
When bit 3 is set to ‘0’ no Program or Erase operations have been attempted with PEN Low,
V
IL
, since the last Clear Status Register command, or hardware reset.
When bit 3 is set to ‘1’ a Program or Erase operation has been attempted with PEN Low, V
IL
.
Once set to ‘1’, bit 3 can only be reset by a Clear Status Register command or a hardware
reset. If set to ‘1’ it should be reset before a new Program or Erase command is issued,
otherwise the new command will appear to fail.
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NUMONYX [ NUMONYX B.V ]
