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M58LT128HSB8ZA6E 参数 Datasheet PDF下载

M58LT128HSB8ZA6E图片预览
型号: M58LT128HSB8ZA6E
PDF下载: 下载PDF文件 查看货源
内容描述: 128兆位(8 MB 】 16 ,多银行,多接口,突发) 1.8 V电源供电,安全闪存 [128 Mbit (8 Mb 】16, multiple bank, multilevel interface, burst) 1.8 V supply, secure Flash memories]
分类和应用: 闪存存储内存集成电路
文件页数/大小: 110 页 / 2025 K
品牌: NUMONYX [ NUMONYX B.V ]
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DC and AC parameters
Table 22.
Symbol
t
AVAV
t
AVQV
t
AVQV1
t
AXQX(1)
t
ELTV
t
ELQV(2)
Read Timings
t
ELQX(1)
t
EHTZ
t
EHQX(1)
t
EHQZ(1)
t
GLQV(2)
t
GLQX(1)
t
GLTV
t
GHQX(1)
t
GHQZ(1)
t
GHTZ
t
AVLH
Latch Timings
t
ELLH
t
LHAX
t
LLLH
t
LLQV
t
AVADVH
t
ELADVH
t
ADVHAX
t
OH
t
DF
t
OH
t
HZ
t
OE
t
OLZ
t
CE
t
LZ
M58LT128HST, M58LT128HSB
Asynchronous Read AC characteristics
M58LT128HST/B
Alt
t
RC
t
ACC
t
PAGE
t
OH
Parameter
85
Address Valid to Next Address Valid
Address Valid to Output Valid (Random)
Address Valid to Output Valid (Page)
Address Transition to Output Transition
Chip Enable Low to Wait Valid
Chip Enable Low to Output Valid
Chip Enable Low to Output Transition
Chip Enable High to Wait Hi-Z
Chip Enable High to Output Transition
Chip Enable High to Output Hi-Z
Output Enable Low to Output Valid
Output Enable Low to Output Transition
Output Enable Low to Wait Valid
Output Enable High to Output Transition
Output Enable High to Output Hi-Z
Output Enable High to Wait Hi-Z
Address Valid to Latch Enable High
Chip Enable Low to Latch Enable High
Latch Enable High to Address Transition
Min
Max
Max
Min
Max
Max
Min
Max
Min
Max
Max
Min
Max
Min
Max
Max
Min
Min
Min
Min
Max
85
85
25
0
17
85
0
17
0
17
25
0
17
0
17
17
10
10
9
10
85
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Unit
t
ADVLADVH
Latch Enable Pulse Width
t
ADVLQV
Latch Enable Low to Output Valid
(Random)
1. Sampled only, not 100% tested.
2. G may be delayed by up to t
ELQV
- t
GLQV
after the falling edge of E without increasing t
ELQV
.
60/110