NAND08GW3C2B
NAND16GW3C4B
8 or 16 Gbit, 2112 byte page,
3 V supply, multilevel, multiplane, NAND Flash memory
Target Specification
Features
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High density multilevel cell (MLC) Flash
memory
– Up to 16 Gbit memory array
– Up to 512 Mbit spare area
– Cost-effective solutions for mass storage
applications
NAND interface
– x8 bus width
– Multiplexed address/data
Supply voltage: V
DD
= 2.7 to 3.6 V
Page size: (2048 + 64 spare) bytes
Block size: (256K + 8K spare) bytes
Multiplane architecture
– Array split into two independent planes
– Program/erase operations can be
performed on both planes at the same time
Memory cell array:
(2 K + 64 ) bytes x 128 pages x 4096 blocks
Page read/program
– Random access: 60 µs (max)
– Sequential access: 25 ns (min)
– Page program operation time: 800 µs (typ)
Multipage program time (2 pages): 800 µs (typ)
Copy-back program
– Fast page copy
Fast block erase
– Block erase time: 2.5 ms (typ)
Multiblock erase time (2 blocks): 2.5 ms (typ)
Status register
Electronic signature
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TSOP48 12 x 20 mm (N)
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LGA52 12 x 17 mm (N)
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Serial number option
Chip enable ‘don’t care’
Data protection
– Hardware program/erase locked during
power transitions
Development tools
– Error correction code models
– Bad block management and wear leveling
algorithm
– HW simulation models
Data integrity
– 10,000 program/erase cycles (with ECC)
– 10 years data retention
ECOPACK
®
packages available
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March 2008
Rev 2
1/60
1
This is preliminary information on a new product foreseen to be developed. Details are subject to change without notice.
NUMONYX [ NUMONYX B.V ]
