P30
Appendix F Ordering Information for SCSP Products
Figure 47: Decoder for SCSP P30
R D 4 8 F 4 0 0 0 P 0 Z B Q 0
Package Designator
RD = Intel® SCSP, leaded
Device Details
PF = Intel® SCSP, lead-free
0 = Original version of the product
RC = 64-Ball Easy BGA, leaded
PC = 64-Ball Easy BGA, lead-free
datasheet for details)
TE = 56-Lead TSOP, leaded
(refer to the latest version of the
JS = 56-Lead TSOP, lead-free
Ballout Designator
Q = QUAD+ ballout
Group Designator
48F = Flash Memory only
0 = Discrete ballout
Flash Density
0 = No die
2 = 64-Mbit
Parameter, Mux Configuration
B = Bottom Parameter, Non Mux
T = Top Parameter, Non Mux
3 = 128-Mbit
4 = 256-Mbit
I/O Voltage, CE# Configuration
Z = Individual Chip Enable(s)
V = Virtual Chip Enable(s)
VCC = 1.7 V – 2.0 V
Product Family
P = Intel StrataFlash® Embedded Memory
0 = No die
VCCQ = 1.7 V – 3.6 V
Note: For 512-Mbit only, “B” is used for both top and bottom Parameter/Mux configurations.
Table 50: Valid Combinations for Dual- Die Products
64-Mbit
128-Mbit
256-Mbit
512-Mbit*
RD48F2000P0ZBQ0
RD48F2000P0ZTQ0
PF48F2000P0ZBQ0
PF48F2000P0ZTQ0
RD48F3000P0ZBQ0
RD48F3000P0ZTQ0
PF48F3000P0ZBQ0
PF48F3000P0ZTQ0
RD48F4000P0ZBQ0
RD48F4000P0ZTQ0
PF48F4000P0ZBQ0
PF48F4000P0ZTQ0
RD48F4400P0VBQ0
PF48F4400P0VBQ0
RC48F4400P0VB00
PC48F4400P0VB00
TE48F4400P0VB00
JS48F4400P0VB00
Note: * The “B” parameter is used for both “top” and “bottom” options in the 512-Mbit density.
November 2007
Order Number: 306666-11
Datasheet
99
NUMONYX [ NUMONYX B.V ]
