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F87EHHD 参数 Datasheet PDF下载

F87EHHD图片预览
型号: F87EHHD
PDF下载: 下载PDF文件 查看货源
内容描述: [FXTH87E, Family of Tire Pressure Monitor Sensors]
分类和应用:
文件页数/大小: 183 页 / 1700 K
品牌: NXP [ NXP ]
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NXP Semiconductors  
FXTH87E  
FXTH87E, Family of Tire Pressure Monitor Sensors  
4.4.11 RESET pin  
The RESET pin is used for test and establishing the BDM condition and providing the  
programming voltage source to the internal FLASH memory. This pin can also be used to  
direct to the MCU to the reset vector as described in Section 7.2 "MCU reset".  
The RESET pin has an internal pullup device and can connected to VDD in the application  
unless there is a need to enter BDM operation after the device as been soldered to the  
PWB. If in-circuit BDM is desired the RESET pin can be left unconnected; but should be  
connected to VDD through a low impedance resistor (< 10 kΩ) which can be over-driven  
by an external signal. This low impedance resistor reduces the possibility of getting into  
the debug mode in the application due to an EMC event.  
Activation of the external reset function occurs when the voltage on the RESET pin goes  
below 0.3 x VDD for at least 100 ns before rising above 0.7 x VDD as shown in Figure 7.  
> 100 nsec  
0.7 VDD  
RESET  
Reset  
initiated  
0.3 VDD  
aaa-027996  
Figure 7.ꢀRESET pin timing  
4.4.12 PTB[1:0] pins  
The PTB[1:0] pins are general purpose I/O pins. The PTB[1:0] pin functions become  
high-impedance when the LF receiver has been enabled. These two pins can be  
configured as nominal bidirectional I/O pins with programmable pullup. User software  
must configure the general purpose I/O pins so that they do not result in "floating" inputs  
as described in Section 8.1 "Unused pin configuration". Refer to Section 7 "Reset,  
interrupts and system configuration" for details regarding pin multiplexing priorities.  
5 Modes of operation  
The operating modes of the FXTH87E are described in this section. Entry into each  
mode, exit from each mode, and functionality while in each of the modes are described.  
5.1 Features  
ACTIVE BACKGROUND DEBUG mode for code development  
STOP modes:  
System clocks stopped  
STOP1: Power down of most internal circuits, including RAM, for maximum power  
savings; voltage regulator in standby  
STOP4: All internal circuits powered and full voltage regulation maintained for fastest  
recovery  
5.2 RUN mode  
This is the normal operating mode for the FXTH87E. This mode is selected when the  
BKGD/PTA4 pin is high at the rising edge of reset. In this mode, the CPU executes code  
FXTH87ERM  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2019. All rights reserved.  
Reference manual  
Rev. 5.0 — 4 February 2019  
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