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MC34PF4210A0ES 参数 Datasheet PDF下载

MC34PF4210A0ES图片预览
型号: MC34PF4210A0ES
PDF下载: 下载PDF文件 查看货源
内容描述: [14-channel power management integrated circuit (PMIC) for audio/video applications]
分类和应用: 集成电源管理电路
文件页数/大小: 137 页 / 1328 K
品牌: NXP [ NXP ]
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NXP Semiconductors  
PF4210  
14-channel power management integrated circuit (PMIC) for audio/video applications  
8.4.2 Current consumption  
Table 7.ꢀCurrent consumption summary  
TMIN to TMAX (see Table 4), VIN = 3.6 V, VDDIO = 1.7 V to 3.6 V, LICELL = 1.8 V to 3.3 V, VSNVS = 3.0 V, typical external  
component values, unless otherwise noted. Typical values are characterized at VIN = 3.6 V, VDDIO = 3.3 V, LICELL =  
3.0 V, VSNVS = 3.0 V and 25 °C, unless otherwise noted.  
Mode  
PF4210 conditions  
System conditions  
Typ  
Max  
Unit  
[1] [2]  
Coin cell  
VSNVS from LICELL  
All other blocks off  
VIN = 0.0 V  
No load on VSNVS  
4.0  
7.0  
µA  
VSNVSVOLT[2:0] = 110  
[1] [3]  
Off  
VSNVS from VIN or LICELL  
Wake-up from PWRON active  
32 kHz RC on  
No load on VSNVS, PMIC  
able to wake-up  
17  
25  
µA  
µA  
All other blocks off  
VIN ≥ UVDET  
[1]  
Sleep  
VSNVS from VIN  
No load on VSNVS. DDR  
memories in self refresh  
122  
122  
220 [4]  
250 [5]  
Wake-up from PWRON active  
Trimmed reference active  
SW3A/B PFM  
Trimmed 16 MHz RC off  
32 kHz RC on  
VREFDDR disabled  
[1]  
Standby  
VSNVS from either VIN or LICELL  
SW1A/B combined in PFM  
SW1C in PFM  
No load on VSNVS.  
Processor enabled in  
lowpower mode. All rails  
powered on except boost  
(load = 0 mA)  
297  
297  
450 [4]  
550 [5]  
µA  
SW2 in PFM  
SW3A/B combined in PFM  
SW4 in PFM  
SWBST off  
Trimmed 16 MHz RC enabled  
Trimmed reference active  
VGEN1 to 6 enabled  
VREFDDR enabled  
[1] For PFM operation, headroom should be 300 mV or greater.  
[2] Additional current may be drawn in the coin cell mode when RESETBMCU is pulled up to VSNVS due to an internal path from RESETBMCU to VIN. The  
additional current is < 30 µA with a pullup resistor of 100 kΩ.  
[3] When VIN is below the UVDET threshold, in the range of 1.8 V ≤ VIN < 2.65 V, the quiescent current increases by 50 µA, typically.  
[4] From −40 °C to 85 °C  
[5] From −40 °C to 105 °C  
9 Detailed description  
The PF4210 is the power management integrated circuit (PMIC) designed primarily for  
use with NXP's i.MX 8M family of applications processors.  
9.1 Features  
This section summarizes the PF4210 features.  
Input voltage range to PMIC: 2.8 V to 4.5 V  
PF4210  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2018. All rights reserved.  
Data sheet: technical data  
Rev. 2.0 — 14 November 2018  
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