PCF8593
Low power clock and calendar
Rev. 04 — 6 October 2010
Product data sheet
1. General description
The PCF8593 is a CMOS
1
clock and calendar circuit, optimized for low power
consumption. Addresses and data are transferred serially via the two-line bidirectional
I
2
C-bus. The built-in word address register is incremented automatically after each written
or read data byte. The built-in 32.768 kHz oscillator circuit and the first 8 bytes of the RAM
are used for the clock, calendar, and counter functions. The next 8 bytes can be
programmed as alarm registers or used as free RAM space.
2. Features and benefits
I
2
C-bus interface operating supply voltage: 2.5 V to 6.0 V
Clock operating supply voltage 1.0 V to 6.0 V at 0
°C
to +70
°C
8 bytes scratchpad RAM (when alarm not used)
Data retention voltage: 1.0 V to 6.0 V
External RESET input resets I
2
C interface only
Operating current (at f
SCL
= 0 Hz, 32 kHz time base, V
DD
= 2.0 V): typical 1
μA
Clock function with four year calendar
Universal timer with alarm and overflow indication
24 hour or 12 hour format
32.768 kHz or 50 Hz time base
Serial input and output bus (I
2
C-bus)
Automatic word address incrementing
Programmable alarm, timer, and interrupt function
Space-saving SO8 package available
Slave addresses: A3h for reading, A2h for writing
3. Ordering information
Table 1.
Ordering information
Package
Name
PCF8593P
PCF8593T
DIP8
SO8
Description
plastic dual in-line package; 8 leads (300 mil)
plastic small outline package; 8 leads;
body width 3.9 mm
Version
SOT97-1
SOT96-1
Type number
1.
The definition of the abbreviations and acronyms used in this data sheet can be found in
PHILIPS [ NXP SEMICONDUCTORS ]
