E2G1057-29-41
¡ Semiconductor
MD56V62320
¡ Semiconductor
This version: Apr. 1999
MD56V62320
e
Pr
lim
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ar
in
4-Bank
¥
524,288-Word
¥
32-Bit SYNCHRONOUS DYNAMIC RAM
DESCRIPTION
The MD56V62320 is a 4-bank
¥
524,288-word
¥
32-bit synchronous dynamic RAM, fabricated in
Oki's CMOS silicon-gate process technology. The device operates at 3.3 V. The inputs and
outputs are LVTTL compatible.
FEATURES
Silicon gate, quadruple polysilicon CMOS, 1-transistor memory cell
4-bank
¥
524,288-word
¥
32-bit configuration
3.3 V power supply,
±0.3
V tolerance
Input
: LVTTL compatible
Output : LVTTL compatible
Refresh : 4096 cycles/64 ms
Programmable data transfer mode
–
CAS
latency (2, 3)
– Burst length (2, 4, 8)
– Data scramble (sequential, interleave)
• CBR auto-refresh, Self-refresh capability
• Package:
86-pin 400 mil plastic TSOP (Type II) (TSOPII86-P-400-0.50-K) (Product : MD56V62320-xxTA)
xx indicates speed rank.
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PRODUCT FAMILY
Family
MD56V62320-10
Max.
Frequency
100 MHz
Access Time (Max.)
t
AC2
9 ns
t
AC3
9 ns
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