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MK32VT1664A-8YC 参数 Datasheet PDF下载

MK32VT1664A-8YC图片预览
型号: MK32VT1664A-8YC
PDF下载: 下载PDF文件 查看货源
内容描述: 16777216字×64位同步动态RAM模块( 2BANK ) [16,777,216 Word x 64 Bit SYNCHRONOUS DYNAMIC RAM MODULE (2BANK)]
分类和应用:
文件页数/大小: 11 页 / 104 K
品牌: OKI [ OKI ELECTRONIC COMPONETS ]
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MK32VT1664A-8YC (98.07.17)
AC CHARACTERISTIC
Parameter
Clock Cycle Time
Access Time from Clock
CL=3
CL=2
CL=3
Symbol
t
CC
t
AC
t
CH
t
CL
t
SI
t
HI
t
OLZ
t
OHZ
t
OH
t
RC
t
RP
t
RAS
t
RCD
t
WR
t
RRD
t
REF
t
PDE
t
T
I
CCD
I
CKE
I
DOZ
I
DOD
I
DWD
I
ROH
(Vcc = 3.3V
±
0.3V, Ta = 0 ~70°C)
NOTE 1, 2
Module Spec.
Unit
Note
Min.
Max.
8
12
-
-
3
3
2
1
3
-
3
80
30
48
20
8
16
-
t
SI
+1CLK
-
1
1
2
0
0
3
2
2
2
-
-
6
10
-
-
-
-
-
8
-
-
-
100,000
-
-
-
64
-
3
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
ns
ns
Cycle
Cycle
Cycle
Cycle
Cycle
Cycle
Cycle
Cycle
Cycle
.
3, 4
3, 4
Clock "H" Pulse Time
Clock "L" Pulse Time
Input Setup Time
Input Hold Time
Output Low Impedance Time from Clock
Output High Impedance Time from Clock
Output Hold from Clock
/RAS Cycle Time
/RAS Precharge Time
/RAS Active Time
/RAS to /CAS Delay Time
Write Recovery Time
/RAS to /RAS Bank Active Delay Time
Refresh Time
Power-down Exit Set-up Time
Input Level Transition Time
/CAS to /CAS Delay Time (Min)
Clock Disable Time from CKE
Data Output High Impedance Time from DQMB
3
Data Input Mask Time from DQMB
Data Input Time from Write Command
Data Output High Inpedance
CL=3
Time from Precharge Command
CL=2
Active Command Input Time from MODE
Register Set Command Input (Min)
Write Command Input Time from Output
I
MRD
t
OWD
NOTES:
1) AC measurements assume t
T
=1ns.
2)
The reference level for timing of input signals is 1.4V.
3) This parameter is measured with a load circuit equivalent to 1 TTL load and 50pF
(R
Load
is 50ohm).
4)
An access time is measured at 1.4V.
5) If t
T
is longer than 1ns, the reference level for timing of input signals are V
IH
and V
IL
.
1.4v
50Ω
OUTPUT
OUTPUT LOAD
50pF
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