FEDL60851E-01
OKI Semiconductor
ML60851E
PIN DESCRIPTION
Pin
1, 2
6, 7
4, 5
13 to 16,
19 to 22
35 to 38,
41 to 44
25 to 32
8
9
10
12
34
33
23
24
11
Symbol
D+, D–
XIN, XOUT
TEST1, 2
D15 to D8
AD7 to AD0
A7 to A0
CS
RD
WR
INTR
DREQ
DACK
ALE
ADSEL
RESET
Type
I/O
—
I
I/O
I/O
I
I
I
I
O
O
I
I
I
I
USB data
Pins for external crystal oscillator
Test pins (normally “L”)
Data bus (MSB)
Data bus (LSB)/address inputs
Address inputs
Chip select signal input pin. LOW active
Read signal input pin. LOW active
Write signal input pin. LOW active
Interrupt request signal output pin
DMA request output pin
DMA acknowledge signal input pin
Address latch enable signal input pin
Address input mode select input pin. “H”: address/data multiplex
System reset signal input pin. LOW active.
Description
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