FEDL674001-01
OKI Semiconductor
ML674001/67Q4002/67Q4003
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External memory controller
ROM (FLASH): 16 Mbytes
SRAM: 16 Mbytes
DRAM: 64 Mbytes (SDRAM and EDO-DRAM support)
External IO devices: 16 Mbytes x 2 banks, 4 Chip select pins
Wait control input signal for each bank
Independent programmable wait settings for each bank
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Interrupt controller
28 sources: 23 internals and 5 externals (IRQ: 4, FIQ: 1)
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DMA controller
2 channels: Dual address mode, cycle steal and burst tranfer mode
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Timer
1 channel: 16-bit auto reload for operating system
6 channels: 16-bit auto reload for application
1 channel: 16 bit watchdog timer
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Serial interface
1 channel: UART
1 channel: UART with 16-byte FIFO
1 channel: synchronous
1 channel: I2C (single master)
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Parallel I/O Port
4 ports x 8 bits (bitwise input/output settings)
1 port x 10 bit (bitwise input/output settings)
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PWM
2 channels x 16 bits
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Analog-to-Digital Converter
4 channels x 10 bits
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Power down mechanism
Standby (all clock stop) and Halt (clock stop by each function block)
Clock gear (selectable 1/1, 1/2, 1/4, 1/8, 1/16 input clock frequency)
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JTAG interface
Connectable to JTAG ICE
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Power supply voltage
Core section: 2.25 V to 2.75 V
IO section: 3.0 V to 3.6 V
Analog section: 3.0 V to 3.6 V
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Operating frequency
1-33 MHz
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Operating temperature (ambient temperature)
–40°C to +85°C
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Package
144-pin plastic LQFP (LQFP144-P-2020-0.50)
144-pin plastic LFBGA (P-LFBGA144-1111-0.80)
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