¡ Semiconductor
ML9041
PIN DESCRIPTIONS
Symbol
R/W
I/F Mode.
This pin should be open in the Serial I/F Mode.
RS
0
, RS
1
The input pins with a pull–up resistor– to select a register in the Parallel I/F Mode.
RS
1
H
H
L
E
RS
0
H
L
L
Name of register
Data register
Instruction register
Expansion Instruction register
Description
The input pin with a pull–up resistor to select Read (“H”) or Write (“L”) in the Parallel
This pin should be open in the Serial I/F Mode.
The input pin for data input/output between the CPU and the ML9041 and for activating
instructions in the Parallel I/F Mode.
This pin should be open in the Serial I/F Mode.
DB
0
to DB
3
The input/output pins to transfer data of lower–order 4 bits between the CPU and the
ML9041 in the Parallel I/F Mode. Each pin is equipped with a pull–up resistor. These 4
lines are not used for the 4–bit interface.
This pin should be open in the Serial I/F Mode.
DB
4
to DB
7
The input/output pins to transfer data of upper 4 bits between the CPU and the ML9041
in the Parallel I/F Mode. Each pin is equipped with a pull–up resistor.
This pin should be open in the Serial I/F Mode.
OSC
1
OSC
2
OSC
R
The clock oscillation pins required for LCD drive signals and the operation of the
ML9041 by instructions sent from the CPU.
To input external clock, the OSC
1
pin should be used. The OSC
R
and the OSC
2
pins
should be open.
To start oscillation with an external resistor, the resistor should be connected between
the OSC
1
and OSC
2
pins. The OSC
R
pin should be open.
To start oscillation with an internal resistor, the OSC
2
and OSC
R
pins should be
short–circuited outside the ML9041. The OSC
1
pin should be open.
COM
1
to COM
17
The LCD common signal output pins.
For 1/9 duty, non–selectable voltage waveforms are output via COM
10
to COM
17
. For
1/12 duty, non–selectable voltage waveforms are output via COM
13
to COM
17
.
SEG
1
to SEG
100
The LCD segment signal output pins.
4/54
OKI [ OKI ELECTRONIC COMPONETS ]
