PEDL9044-03
1
Semiconductor
ML9044-xxA/xxB
(GND = 0 V, V
DD
= 2.5 to 5.5 V, Ta = –40 to +85°C)
Parameter
Maximum and
minimum LCD
drive voltages
when internal
variable resistors
are used.
Bias Voltage for
Driving LCD by
External Input
Symbol
V
LCD
MAX
V
LCD
MIN
V
LCD1
V
LCD2
Condition
V
DD
= 5 V, 1/5 bias
V
5IN
= 0 V,
Contrast data: 1F
V
DD
= 5 V, 1/5 bias
V
5IN
= 0 V,
Contrast data: 00
V
DD
–V
5
1/5 bias
2.8
2.8
Min.
Typ.
Max.
Unit
Applicable
pins
4.6
—
V
V
DD
–V
5
—
—
—
3.4
7.0
V
Note 7 1/4 bias
V
DD
= 3 V, V
IN
= 0 V
f = 270 kHz
V
7.0
V
5
Voltage Multiplier
Output Voltage
V
5OUT
A capacitor for the voltage
multiplier = 4.7
µF
No load
BEB = H
V
DD
–(V
DD
–
V
IN
)
×
2–0.1
—
V
DD
–(V
DD
–V
IN
)
×
2+1.2 V
V
V
5
, V
5IN
Voltage Multiplier
Input Voltage
V
IN
V
DD
–3.5 V
V
DD
/2
V
V
IN
Note 1:
Applied to the voltage drop occurring between any of the V
DD
, V
1
, V
4
and V
5
pins and any of the
common pins (COM
1
to COM
17
) when the current of 4
µA
flows in or flows out at one common
pin.
Also applied to the voltage drop occurring between any of the V
DD
, V
2
, V
3A
(V
3B
) and V
5
pins and
any of the segment pins (SEG
1
to SEG
120
) when the current of 4
µA
flows in or flows out at one
common pin.
The current of 4
µA
flows out when the output level is V
DD
or flows in when the output level is
V
5
.
Note 2:
Applied to the current flowing into the V
DD
pin when the external clock (f
OSC2
= f
in
= 270 kHz) is
fed to the internal R
f
oscillation or OSC
1
under the following conditions:
V
DD
= 5 V
GND = V
5
= 0 V,
V
1
, V
2
, V
3A
(V
3B
) and V
4
: Open
E, SSR, CSR, and BEB: “L” (fixed)
Other input pins: “L” or “H” (fixed)
Other output pins: No load
9/60
OKI [ OKI ELECTRONIC COMPONETS ]
