FEDL9090A-01
1
Semiconductor
ML9090A-01, -02
Pin Functional Descriptions
•
CS
Chip select input pin. An “L” level selects the chip, and an “H” level does not select the chip. During the “L” level,
internal registers can be accessed.
•
CP
Clock input pin for serial interface data I/O. An internal Schmitt circuit is connected to this pin. Data input to the
DI/O pin is synchronized to the rising edge of the clock. Output from the DI/O pin is synchronized to the falling
edge of the clock.
•
DI/O
Serial interface data I/O pin. This pin is in the output state only during the interval beginning when key scan data
read or RAM read commands are written until the
CS
signal rises. At all other times this pin is in the input state.
(When reset, the input state is set.) In other words, this pin goes into the output state only when the key scan
register or the display data RAM is read. The relation between data level of this pin and operation is listed below.
Data level
“H”
“L”
LCD display
Light ON
Light OFF
Port
“H”
“L”
Key status
ON
OFF
•
KREQ
Key scan read READY signal output pin. Two scan cycles after a key switch is switched ON, this pin goes to an
“H” level. When all key switches are OFF, this pin returns to an “L” level.
This signal can be used as a flag. To use it as a flag, start the key-scan reading when the KREQ signal changes to
an “H” level from an “L” level. If the key-scan reading starts when the KREQ signal changes to an “L” level from
an “H” level, scanned data may be unstable. To avoid this, repeat the key-scan reading three times.
When the key-scan reading starts when this pin goes to an “L” level, data when a key switch is off is read.
•
OSC1
Input pin for RC oscillation. An oscillation circuit is formed by connecting a resistor (R) of 56kΩ
±2%
to this pin
and the OSC2 pin. If an external master oscillation clock is to be input, input the master oscillation clock to this
pin.
OSC1
R = 56 kΩ
(V
DD
= 2.7 to 5.5 V)
R
OSC2
•
OSC2
Output pin for RC oscillation. An oscillation circuit is formed by connecting a resistor (R) of 56kΩ
±2%
to this pin
and the OSC1 pin. If an external master oscillation clock is to be input, leave this pin unconnected (open).
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