¡ Semiconductor
Serial Signal to be Input From CPU
The following signals are input from an external CPU to this LCD driver.
- Serial transfer clock
Æ
SCK
- Serial transfer data
Æ
SI
- Serial transfer latch
Æ
LATCH
- Serial data select
Æ
A/D
The operations are shown in the following table.
Mode
Address data
input mode
Segment data
input mode
A/D
H
SCK
Shifts at
LATCH
8-bit address latch at falling
8-bit address data
SI
MSC5301B-01
the rising edge edge (level sensitive)
Shifts at
64-bit segment data latch at
Serial input from LSB side
64-bit segment data
Serial input from S63 corresponding data
"1" : Display-on data, "0" : Display-off data
L
the rising edge falling edge (level sensitive)
Timing Chart of Serial Signal Transferred From CPU
A/D
"H" at address data setting
"L" at segment data setting
1
2
3
4
5
6
7
8
1
2
3
63 64
SCK
A0 A1 A2 A3 CS0 CS1 Dummy Dummy
S63 S62 S61
S1
S0
SI
LSB
MSB
Address data (8 bits)
Segment data (64 bits)
LATCH
Address latch
signal
RAM write
signal
Notes:
1. Make sure to set the address before writing the segment data to RAM. Then, write the segment
data to RAM.
2. While the POR pin is "H" (upon power-on reset), neither the address data nor the segment
data can be entered.
13/15
OKI [ OKI ELECTRONIC COMPONETS ]
