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MSM514262-70JS 参数 Datasheet PDF下载

MSM514262-70JS图片预览
型号: MSM514262-70JS
PDF下载: 下载PDF文件 查看货源
内容描述: 262,144字×4位多端口DRAM [262,144-Word x 4-Bit Multiport DRAM]
分类和应用: 存储内存集成电路光电二极管动态存储器
文件页数/大小: 45 页 / 501 K
品牌: OKI [ OKI ELECTRONIC COMPONETS ]
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¡ Semiconductor  
MSM514262  
Notes: 1. These parameters depend on output loading. Specified values are obtained with  
the output open.  
2. These parameters are masured at minimum cycle test.  
3. I  
(Max.) are mesured under the condition of TTL input level.  
CC2  
4. V (Min.)andV (Max.)arereferencelevelsformeasuringtimingofinputsignals.  
IH  
IL  
Also, transition times are measured between V and V .  
IH  
IL  
5. An initial pause of 200 ms is required after power-up followed by any 8 RAS cycles  
(DT/OE “high”) and any 8 SC cycles before proper divice operation is achieved. In  
the case of using an internal refresh counter, a minimum of 8 CAS before RAS  
initialization cycles in stead of 8 RAS cycles are required.  
6. AC measurements assume t = 5 ns.  
T
7. RAM port outputs are mesured with a load equivalent to 1 TTL load and 100 pF.  
Output reference levels are V /V = 2.4 V/0.8 V.  
OH  
OL  
8. SAM port outputs are measured with a load equivalent to 1 TTL load and 30 pF.  
Output reference levels are V /V = 2.0 V/0.8 V.  
OH  
OL  
9. t  
(Max.), t  
(Max.), t  
(Max.) and t  
(Max.) difine the time at which the  
OFF  
OEZ  
SDZ  
SEZ  
outputs achieve the open circuit condition and are not reference to output voltage  
levels.  
10. Either t  
or t  
must be satisfied for a read cycle.  
RCH  
RRH  
11. These parameters are referenced to CAS leading edge of early write cycles and to  
WB/WE leading edge in OE controlled write cycles and read modify write cycles.  
12. t  
, t  
, t  
and t  
are not restrictive operating parameters. They are  
WCS RWD CWD  
AWD  
included in the data sheet as electrical characteristics only.  
If t t (Min.), the cycle is an early write cycle, and the data out pin will  
WCS  
WCS  
remain open circuit (high impedance) throughout the entire cycle : If t  
t  
RWD  
RWD  
(Min.), t  
t  
(Min.) and t  
t  
(Min.) the cycle is a read-write cycle  
CWD  
CWD  
AWD  
AWD  
and the data out will contain data read from the selected cell : If neither of the above  
sets of conditions is satisfied, the condition of the data out (at access time) is  
indterminate.  
13. Operation within the t  
(Max.) limit ensures that t  
(Max.) can be met. t  
RCD  
RAC  
RCD  
RCD  
(Max.)isspecifiedasareferencepointonly:Ift  
isgreaterthanthespecifiedt  
RCD  
(Max.) limit, then access time is controlled by t  
.
CAC  
14. Operation within the t  
(Max.) limit ensures that t  
(Max.) can be met. t  
RAC  
RAD  
RAD  
RAD  
(Max.)isspecifiedasareferencepointonly:Ift  
isgreaterthanthespecifiedt  
RAD  
(Max.) limit, then access time is controlled by t  
.
AA  
15. Input levels at the AC parameter measurement are 3.0 V/0 V.  
16. Stresses greater than those listed under “Absolute Maximum Ratings” may cause  
permenent damege to the device.  
17. All voltages are referenced to V .  
SS  
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