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MSM51V8221A 参数 Datasheet PDF下载

MSM51V8221A图片预览
型号: MSM51V8221A
PDF下载: 下载PDF文件 查看货源
内容描述: 262214字×8位字段存储 [262,214-Word x 8-Bit Field Memory]
分类和应用: 存储
文件页数/大小: 17 页 / 199 K
品牌: OKI [ OKI ELECTRONIC COMPONETS ]
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E2L0054-28-Z2
¡ Semiconductor
¡ Semiconductor
MSM51V8221A
262,214-Word
¥
8-Bit Field Memory
This version: Dec. 1998
MSM51V8221A
Previous version: Mar. 1998
DESCRIPTION
The OKI MSM51V8221A is a high performance 2-Mbit, 256K
¥
8-bit, Field Memory. It is designed
for high-speed serial access applications such as HDTVs, conventional NTSC TVs, VTRs, digital
movies and Multi-media systems. It is a FRAM for wide or low end use as general commodity
TVs and VTRs, exclusively. The MSM51V8221A is not designed for the other use or high end
use in medical systems, professional graphics systems which require long term picture, and
data storage systems and others. The 2-Mbit capacity fits one field of a conventional NTSC TV
screen.
Each of the 8-bit planes has separate serial write and read ports. These employ independent control
clocks to support asynchronous read and write operations. Different clock rates are also supported,
which allow alternate data rates between write and read data streams.
The MSM51V8221A provides high speed FIFO, First-In First-Out, operation without external
refreshing: it refreshes its DRAM storage cells automatically, so that it appears fully static to the users.
Moreover, fully static type memory cells and decoders for serial access enable the refresh free serial
access operation, so that serial read and/or write control clock can be halted high or low for any
duration as long as the power is on. Internal conflicts of memory access and refreshing operations
are prevented by special arbitration logic.
The MSM51V8221A's function is simple, and similar to a digital delay device whose delay-bit-length
is easily set by reset timing. The delay length, and the number of read delay clocks between write
and read, is determined by externally controlled write and read reset timings.
Additional SRAM serial registers, or line buffers for the initial access of 256
¥
8-bit enable high speed
first-bit-access with no clock delay just after the write or read reset timings.
The MSM51V8221A is similar in operation and functionality to OKI 1-Mbit Field Memory
MSM51V4221C. It has a write mask function or input enable function (IE), and read-data skipping
function or output enable function (OE). The differences between write enable (WE) and input
enable (IE), and between read enable (RE) and output enable (OE) are that WE and RE can stop serial
write/read address increments, but IE and OE cannot stop the increment, when write/read clocking
is continuously applied to MSM51V8221A. The input enable (IE) function allows the user to write
into selected locations of the memory only, leaving the rest of the memory contents unchanged. This
facilitates data processing to display a "picture in picture" on a TV screen.
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