¡ Semiconductor
MSM60804
PIN DESCRIPTION
Drive
Current
Count
(mA)
Pin
24
—
System Address Bus
The address bus lines of host system interface.
These lines enable direct addressing of the 16MB memory space
on the card. In the Word Access mode, SA0 is not used.
These lines are connected to LA[23:17] and SA[16:0] of the 16-bit
ISA system.
D [15 : 0]
I/O
16
16
System Data bus
The bidirectional 16-bit data bus lines of host system interface.
The lower byte D[7:0] is also used to access a register in the PCIC.
When the MSM60804 is connected to an 8-bit system, pins of the
higher byte are pulled up.
RSTD
I
1
—
System Reset Drive
An active-high System Reset signal
This signal is used to reset the PCIC and also drive the Base Address
Select signal of a register in the PCIC.
ISAPWR
I
1
—
ISA Power Supply
This pin selects an interface type of pins connected to the system:
high for 5 V TTL interface or low for the other interface type (3 V
TTL interface or 5 V/3 V CMOS interface). This pin is internally
pulled up.
BALE
I
1
—
Bus Address Latch Enable
This pin is active high and used to latch LA[23:17] at the start of
bus cycle timing.
SCLK
I
1
—
System Clock
A system clock input of the ISA
This pin determines
ICHK
timing and
MEMR
and
MEMW
delays
in 16-bit accessing. The pulse width of
ICHK
is three times as
wide as the clock cycle. When a bus cycle wait is set by a register,
the pulse width of IRDY is equal to one SCLK (1 wait).
IOWR
I
1
—
I/O Port Write
An active-low I/O Write signal
This pin drives data output to an I/O port pointed to by a system
address.
IORD
I
1
—
I/O Port Read
An active-low I/O Read signal
This pin drives data input from an I/O port pointed to by a system
address.
Symbol
System Interface Pins
LA [23 : 17]
SA [16 : 0]
I/O
Description
I
6/50