FEDL6722-05
OKI Semiconductor
UP/DOWN Mode Only
Pin
5
2
3
1
4
Symbol
MS
UPC
I
DWC
PD
PRST
I
I
Type
I
Description
Mode select pin. This pin must always be tied low.
Pins for raising or lowering the pitch by one step at a time.
The pitch changes by one step upward (or downward) each time
a "H" level pulse is input to the UPC (or DWC) pin. The circuit enters
the "no pitch change" state when an "H" level pulse is input to these
pins simultaneously.
Power-down pin. All clocks, including the internal oscillator circuit, are
stopped when the PD pin is set to the "H" level.
Pitch reset pin. The circuit enters the "no pitch change" state when
this pin is set to the "H" level.
MSM6722
Binary Mode Only
Pin
5
1
2
3
4
Symbol
MS
P3
P2
P1
P0
I
Type
I
Description
Mode select pin. This pin must always be tied high.
The pitch step is directly set by 4 pins (bits) of P3 (MSB) to P0 (LSB).
One of the 16 steps from step 0 (P3=P2=P1=P0="L") to step 15(P3=P2=
P1=P0="H") can be set.
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