¡ Semiconductor
MSM9810
PIN DESCRIPTIONS
Pin
40-47, 49-64
Symbol
RA23-RA0
Type
O
when
RCS
pin is "H".
Data pin for external memory. Pull-down resistors are internally
30, 31, 33-38
39
8
RD7-RD0
ROE
RCS
I
O
I
connected to these pins. These pull-down resistors become valid when
the
RCS
pin is "H", and become invalid when the
RCS
pin is "L".
Output enable pin for external memory.
When this pin is "L", RA23 to RA0 and
ROE
pins output address data and
output enable signal.
When this pin is "H", RA23 to RA0 and
ROE
pins become high impedance.
Select pin for Command data or Subcommand data.
15
CMD
I
When this pin is "H", subcommand input is selected. When this pin is "L",
command input is selected.
A pull-up resistor is internally connected to this pin.
16
18
20
RD
WR
CS
I
I
I
Read pin for CPU interface.
A pull-up resistor is internally connected to this pin.
Write pin for CPU interface.
A pull-up resistor is internally connected to this pin.
Chip select pin for CPU interface. When
CS
is "H",
WR
signal is not
entered in this IC. A pull-up resistor is internally connected to this pin.
CPU interface select pin. When SERIAL is "H", serial input interface is
14
SERIAL
I
selected.
When it is "L", parallel input interface is selected.
Data bus pin for CPU interface when parallel input interface is selected.
When
WR
is "L", this pin serves as data input pin.
28
D7/SD
I/O
When
RD
is "L", this pin serves as channel status data output pin.
When serial input interface is selected, this pin serves as serial data
input pin.
Data bus pin for CPU interface when parallel input interface is selected.
When
WR
is "L", this pin serves as data input pin.
27
D6/SI
I/O
When
RD
is "L", this pin serves as channel status output pin.
When serial input interface is selected, this pin serves as serial clock
input pin.
Data bus pin for CPU interface when parallel input interface is selected.
When
WR
is "L", this pin serves as data input pin.
26
D5/SO
I/O
When
RD
is "L", this pin serves as channel status output pin.
When serial input interface is selected, this pin serves as channel status
output pin.
Description
Address pins for external memory. These pins become high impedance
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