MC10E101, MC100E101
LOGIC DIAGRAM AND PINOUT ASSIGNMENT
D
3a
25
D
2d
D
2c
D
2b
V
EE
D
2a
D
1d
D
1c
26
27
28
1
LOGIC DIAGRAM
D
0a
D
0b
D
3b
24
D
3c
23
D
3d
V
CCO
22
21
Q
3
20
Q
3
19
18
17
16
Q
2
Q
2
V
CC
Q
1
Q
1
Q
0
Q
0
Q
0
Q
0
D
0c
D
0d
D
1a
D
1b
D
1c
D
1d
D
2a
D
2b
D
2c
D
2d
D
3a
D
3b
D
3c
D
3d
Q
1
Q
1
Pinout: 28-Lead PLCC
(Top View)
15
14
13
12
2
3
4
5
D
1b
6
D
1a
7
D
0d
8
D
0c
9
D
0b
10
11
Q
2
Q
2
Q
3
Q
3
D
0a
V
CCO
* All V
CC
and V
CCO
pins are tied together on the die.
Warning: All V
CC
, V
CCO,
and V
EE
pins must be externally
connected to Power Supply to guarantee proper operation.
PIN DESCRIPTION
PIN
D
0a
− D
3d
Q
0
− Q3, Q
0
− Q
3
V
CC
, V
CCO
V
EE
ECL Data Inputs
ECL Differential Outputs
Positive Supply
Negative Supply
FUNCTION
MAXIMUM RATINGS
(Note 1)
Symbol
V
CC
V
I
I
out
T
A
T
stg
q
JA
q
JC
T
sol
Parameter
PECL Mode Power Supply
PECL Mode In ut Voltage
Input
NECL Mode Input Voltage
Output Current
Operating Temperature Range
Storage Temperature Range
Thermal Resistance (Junction to Ambient)
Thermal Resistance (Junction to Case)
Wave Solder
0 LFPM
500 LFPM
Standard Board
<2 to 3 sec @ 248°C
28 PLCC
28 PLCC
28 PLCC
Condition 1
V
EE
= 0 V
V
EE
= 0 V
V
CC
= 0 V
Continuous
Surge
V
I
V
CC
V
I
V
EE
Condition 2
Rating
8
6
−6
50
100
0 to +85
−65 to +150
63.5
43.5
22 to 26
265
Units
V
V
V
mA
mA
°C
°C
°C/W
°C/W
°C/W
°C
1. Maximum Ratings are those values beyond which device damage may occur.
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2
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