欢迎访问ic37.com |
会员登录 免费注册
发布采购

MC14013BDR2 参数 Datasheet PDF下载

MC14013BDR2图片预览
型号: MC14013BDR2
PDF下载: 下载PDF文件 查看货源
内容描述: 双D型触发器 [Dual Type D Flip−Flop]
分类和应用: 触发器逻辑集成电路光电二极管
文件页数/大小: 9 页 / 163 K
品牌: ONSEMI [ ON SEMICONDUCTOR ]
 浏览型号MC14013BDR2的Datasheet PDF文件第2页浏览型号MC14013BDR2的Datasheet PDF文件第3页浏览型号MC14013BDR2的Datasheet PDF文件第4页浏览型号MC14013BDR2的Datasheet PDF文件第5页浏览型号MC14013BDR2的Datasheet PDF文件第6页浏览型号MC14013BDR2的Datasheet PDF文件第7页浏览型号MC14013BDR2的Datasheet PDF文件第8页浏览型号MC14013BDR2的Datasheet PDF文件第9页  
MC14013B
Dual Type D Flip−Flop
The MC14013B dual type D flip−flop is constructed with MOS
P−channel and N−channel enhancement mode devices in a single
monolithic structure. Each flip−flop has independent Data, (D), Direct
Set, (S), Direct Reset, (R), and Clock (C) inputs and complementary
outputs (Q and Q). These devices may be used as shift register
elements or as type T flip−flops for counter and toggle applications.
Features
http://onsemi.com
MARKING
DIAGRAMS
14
PDIP−14
P SUFFIX
CASE 646
1
14
SOIC−14
D SUFFIX
CASE 751A
1
14
TSSOP−14
DT SUFFIX
CASE 948G
1
14
SOEIAJ−14
F SUFFIX
CASE 965
1
A
= Assembly Location
WL, L
= Wafer Lot
YY, Y
= Year
WW, W = Work Week
G or
G
= Pb−Free Package
(Note: Microdot may be in either location)
MC14013B
ALYWG
14
013B
ALYW
G
G
14013BG
AWLYWW
MC14013BCP
AWLYYWWG
Static Operation
Diode Protection on All Inputs
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Logic Edge−Clocked Flip−Flop Design
Logic state is retained indefinitely with clock level either high or
low; information is transferred to the output only on the
positive−going edge of the clock pulse
Capable of Driving Two Low−power TTL Loads or One Low−power
Schottky TTL Load Over the Rated Temperature Range
Pin−for−Pin Replacement for CD4013B
Pb−Free Packages are Available
MAXIMUM RATINGS
(Voltages Referenced to V
SS
)
Symbol
V
DD
V
in
, V
out
I
in
, I
out
P
D
T
A
T
stg
T
L
Parameter
DC Supply Voltage Range
Input or Output Voltage Range
(DC or Transient)
Input or Output Current
(DC or Transient) per Pin
Power Dissipation, per Package
(Note 1)
Ambient Temperature Range
Storage Temperature Range
Lead Temperature
(8−Second Soldering)
Value
−0.5
to +18.0
−0.5
to V
DD
+ 0.5
±
10
500
−55
to +125
−65
to +150
260
Unit
V
V
mA
mW
°C
°C
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high−impedance circuit. For proper operation, V
in
and V
out
should be constrained
to the range V
SS
v
(V
in
or V
out
)
v
V
DD
.
Unused inputs must always be tied to an appropriate logic voltage level
(e.g., either V
SS
or V
DD
). Unused outputs must be left open.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
©
Semiconductor Components Industries, LLC, 2006
October, 2006
Rev. 7
1
Publication Order Number:
MC14013B/D