MC14513B
BCD-To-Seven Segment
Latch/Decoder/Driver
CMOS MSI
(Low–Power Complementary MOS)
The MC14513B BCD–to–seven segment latch/decoder/driver is
constructed with complementary MOS (CMOS) enhancement mode
devices and NPN bipolar output drivers in a single monolithic structure.
The circuit provides the functions of a 4–bit storage latch, an 8421
BCD–to–seven segment decoder, and has output drive capability. Lamp
test (LT), blanking (BI), and latch enable (LE) inputs are used to test the
display, to turn–off or pulse modulate the brightness of the display, and
to store a BCD code, respectively. The Ripple Blanking Input (RBI) and
Ripple Blanking Output (RBO) can be used to suppress either leading
or trailing zeroes. It can be used with seven–segment light emitting
diodes (LED), incandescent, fluorescent, gas discharge, or liquid crystal
readouts either directly or indirectly.
Applications include instrument (e.g., counter, DVM, etc.) display
driver, computer/calculator display driver, cockpit display driver, and
various clock, watch, and timer uses.
http://onsemi.com
18
PDIP–18
P SUFFIX
CASE 707
1
MARKING
DIAGRAMS
MC14513BCP
AWLYYWW
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•
•
•
•
•
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Low Logic Circuit Power Dissipation
High–current Sourcing Outputs (Up to 25 mA)
Latch Storage of Binary Input
Blanking Input
Lamp Test Provision
Readout Blanking on all Illegal Input Combinations
Lamp Intensity Modulation Capability
Time Share (Multiplexing) Capability
Adds Ripple Blanking In, Ripple Blanking Out to MC14511B
Supply Voltage Range = 3.0 V to 18 V
Capable of Driving Two Low–Power TTL Loads, One Low–power
Schottky TTL Load to Two HTL Loads Over the Rated Temperature
Range.
Symbol
V
DD
V
in
I
P
D
T
A
T
stg
I
OHmax
P
OHmax
Parameter
DC Supply Voltage Range
Input Voltage Range, All Inputs
DC Current Drain per Input Pin
Power Dissipation,
per Package
(2.)
Operating Temperature Range
Storage Temperature Range
Maximum Continuous Output
Drive Current (Source) per Output
Maximum Continuous Output
Power (Source) per Output
(3.)
Value
– 0.5 to +18.0
– 0.5 to V
DD
+ 0.5
10
500
– 55 to +125
– 65 to +150
25
50
Unit
V
V
mA
mW
°C
°C
mA
mW
A
= Assembly Location
WL or L = Wafer Lot
YY or Y = Year
WW or W = Work Week
ORDERING INFORMATION
Device
MC14513BCP
Package
PDIP–18
Shipping
20/Rail
MAXIMUM RATINGS
(Voltages Referenced to V
SS
)
(1.)
This device contains protection circuitry to protect
the inputs against damage due to high static voltages
or electric fields. However, it is advised that normal
precautions be taken to avoid application of any volt-
age higher than maximum rated voltages to this high–
impedance circuit. A destructive high current mode
may occur if V
in
and V
out
are not constrained to the
range V
SS
(V
in
or V
out
)
V
DD
.
Due to the sourcing capability of this circuit, dam-
age can occur to the device if V
DD
is applied, and the
outputs are shorted to V
SS
and are at a logical 1 (See
Maximum Ratings).
Unused inputs must always be tied to an appropri-
ate logic voltage level (e.g., either V
SS
or V
DD
).
v
v
1. Maximum Ratings are those values beyond which
damage to the device may occur.
2. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/
_
C
From 65
_
C To 125
_
C
3. P
OHmax
= I
OH
(V
DD
– V
OH
)
©
Semiconductor Components Industries, LLC, 2000
1
March, 2000 – Rev. 3
Publication Order Number:
MC14513B/D
ONSEMI [ ON SEMICONDUCTOR ]
